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參數(shù)資料
| 型號： | P60ARM-GP1N |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low power, general purpose 32-bit RISC microprocessor |
| 中文描述： | 低功耗，通用32位RISC微處理器 |
| 文件頁數(shù)： | 73/120頁 |
| 文件大?。?/td> | 1275K |
| 代理商： | P60ARM-GP1N |
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Memory Interface
69
Address translation will normally only be necessary on an N-cycle, and this fact may be exploited to reduce
power consumption in the memory manager and avoid the translation delay at other times. The times when
translation is necessary can be deduced by keeping track of the cycle types that the processor uses.
If an N-cycle is matched to a full DRAM access, it will be longer than the minimum processor cycle time.
Stretching phase 1 rather than phase 2 will give the translation system more time to generate an
(which must be set up to the end of phase 1).
abort
5.5 Locked operations
ARM60 includes a data swap (SWP) instruction that allows the contents of a memory location to be
swapped with the contents of a processor register. This instruction is implemented as an uninterruptable
pair of accesses; the first access reads the contents of the memory, and the second writes the register data to
the memory. These accesses must be treated as a contiguous operation by the memory controller to prevent
another device from changing the affected memory location before the swap is completed. ARM60 drives
the
LOCK
signal HIGH for the duration of the swap operation to warn the memory controller not to give
the memory to another device.
5.6 Stretching access times
All memory timing is defined by
clock. It is usual to stretch the LOW period of
operation if the access is eventually unsuccessful (
if
LATEABT
is LOW configuring ARM60 for early aborts).
MCLK
, and long access times can be accommodated by stretching this
MCLK
, as this allows the memory manager to
ABORT
must be setup prior to the rising edge of
abort the
MCLK
Either
a free-running
and
nWAIT
MCLK
can be stretched before it is applied to ARM60, or the
MCLK
. Taking
nWAIT
LOW has the same effect as stretching the LOW period of
must only change when
MCLK
is LOW.
nWAIT
input can be used together with
MCLK
,
ARM60 does not contain any dynamic logic which relies upon regular clocking to maintain its internal state.
Therefore there is no limit upon the maximum period for which
LOW.
MCLK
may be stretched, or
nWAIT
held
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P60ARM-IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low power, general purpose 32-bit RISC microprocessor |
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| P60AS302 | 制造商:APEM 功能描述: |
| P60AS632-8C | 制造商:NYLOK 功能描述: |
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