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參數(shù)資料
| 型號： | P60ARM-GP1N |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low power, general purpose 32-bit RISC microprocessor |
| 中文描述： | 低功耗，通用32位RISC微處理器 |
| 文件頁數(shù)： | 99/120頁 |
| 文件大小： | 1275K |
| 代理商： | P60ARM-GP1N |
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Boundary Scan Test Interface
95
There is no parallel output from the bypass register.
A logic 0 is loaded from the parallel input of the bypass register in the CAPTURE-DR state.
8.6.2 ARM60 Device IdentiTcation (ID) Code Register
Purpose: This register is used to read the 32-bit device identification code. No programmable
supplementary identification code is provided.
Length: 32 bits
The format of the ID register is as follows:
Please contact your supplier for the correct Device Identification Code.
Operating Mode: When the IDCODE instruction is current, the ID register is selected as the serial path
between
TDI
and
TDO
.
There is no parallel output from the ID register.
The 32-bit device identification code is loaded into the ID register from its parallel inputs during the
CAPTURE-DR state.
8.6.3 ARM60 Boundary Scan (BS) Register
Purpose: The BS register consists of a serially connected set of cells around the periphery of the device, at
the interface between the core logic and the system input/output pads. This register can be used to isolate
the core logic from the pins and then apply tests to the core logic, or conversely to isolate the pins from the
core logic and then drive or monitor the system pins.
Operating modes: The BS register is selected as the register to be connected between
during the SAMPLE/PRELOAD, EXTEST and INTEST instructions. Values in the BS register are used, but
are not changed, during the CLAMP and CLAMPZ instructions.
TDI
and
TDO
only
In the normal (system) mode of operation, straight-through connections between the core logic and pins are
maintained and normal system operation is unaffected.
In TEST mode (i.e. when either EXTEST or INTEST is the currently selected instruction), values can be
applied to the core logic or output pins independently of the actual values on the input pins and core logic
outputs respectively. On the ARM60 all of the boundary scan cells include an update register and thus all
of the pins can be controlled in the above manner. Additional boundary-scan cells are interposed in the scan
chain in order to control the enabling of tristateable buses.
0
1
11
12
27
28
31
1
Manufacturer Identity
Part Number
Version
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P60ARM-IG | Low power, general purpose 32-bit RISC microprocessor |
| P60ARM-B | Low power, general purpose 32-bit RISC microprocessor |
| P60A | 60W DC-DC Converter P60A-Series |
| P60A12D05P | 60W DC-DC Converter P60A-Series |
| P60A12D12P | 60W DC-DC Converter P60A-Series |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P60ARM-IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Low power, general purpose 32-bit RISC microprocessor |
| P-60AS/A18 | 功能描述:BATTERY NICAD 2/3A 600MAH W/TAB RoHS:否 類別:電池產(chǎn)品 >> 電池，充電式（蓄電池） 系列:- MSDS 材料安全數(shù)據(jù)表:Nickel Metal Hydride Battery MSDS 標(biāo)準(zhǔn)包裝:1,000 系列:TWICELL 電池化學(xué):鎳金屬氫化物 電池大小:AAA 電壓 - 額定:1.2V 容量:930mAh 尺寸/尺寸:- 端接類型:焊片 放電速率:186mA 標(biāo)準(zhǔn)充電電流:100mA 標(biāo)準(zhǔn)充電時間:16小時 重量:0.029 磅（13.15g） 裝運(yùn)信息:- 其它名稱:SY153T |
| P60AS302 | 制造商:APEM 功能描述: |
| P60AS632-8C | 制造商:NYLOK 功能描述: |
| P60AS701 | 功能描述:旋鈕開關(guān) 10POS BCD 0.15A 24V RoHS:否 制造商:C&K Components 位置數(shù)量:5 卡片組數(shù)量: 每卡片組極數(shù):2 電流額定值:250 mA 電壓額定值:125 V 指數(shù)角: 觸點(diǎn)類型: 觸點(diǎn)形式:DPST 端接類型:Solder 安裝類型:Panel 觸點(diǎn)電鍍:Silver |
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