參數(shù)資料
型號: P610ARM-B
廠商: Zarlink Semiconductor Inc.
英文描述: General purpose 32-bit microprocessor
中文描述: 通用32位微處理器
文件頁數(shù): 117/173頁
文件大小: 897K
代理商: P610ARM-B
Memory Management Unit
ARM610 Data Sheet
9-13
x is undefined: may read as 0 or 1
Notes:
1
Any abort masked by the priority encoding may be regenerated by fixing the
primary abort and restarting the instruction.
2
In fact this register will contain bits[8:5] of the Level 1 entry which are
undefined, but would encode the domain in a valid entry.
3
The Write Buffer Bus Error is asynchronous and not restartable. The Fault
Address Register reflects the first data operation that could be aborted. The
areas of memory which generate external aborts should not be marked as
bufferable.
4
The entry will be valid if the error was flagged on word 0 of the linefetch.
Otherwise the domain and FAR may be invalid and the cache line may contain
invalid data.
Page
1010
valid
valid
Alignment
00x1
x
valid
Bus Error (translation)
Level1
1100
x
valid
Level2
1110
valid
valid
Translation
Section
0101
Note 2
valid
Page
0111
valid
valid
Domain
Section
1001
valid
valid
Page
1011
valid
valid
Permission
Section
1101
valid
valid
Lowest
Page
1111
valid
valid
Source
FS[3210]
Domain[3:0]
FAR
Table 9-4: Priority encoding of fault status (Continued)
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