參數(shù)資料
型號: P610ARM-B
廠商: Zarlink Semiconductor Inc.
英文描述: General purpose 32-bit microprocessor
中文描述: 通用32位微處理器
文件頁數(shù): 4/173頁
文件大?。?/td> 897K
代理商: P610ARM-B
Contents
ARM610 Data Sheet
Contents-2
4.13
4.14
4.15
4.16
Configuration
5.1
Configuration
5.2
Internal Coprocessor Instructions
5.3
Registers
Instruction and Data Cache (IDC)
6.1
Introduction
6.2
Cacheable Bit - C
6.3
Updateable Bit - U
6.4
IDC Operation
6.5
IDC Validity
6.6
Read-Lock-Write
6.7
IDC Enable/Disable and Reset
Write Buffer (WB)
7.1
Introduction
7.2
Bufferable Bit
7.3
Write Buffer Operation
Coprocessors
8.1
Overview
Memory Management Unit
9.1
Memory Management Unit (MMU)
9.2
MMU Program Accessible Registers
9.3
Address Translation
9.4
Translation Process
9.5
Level One Descriptor
9.6
Page Table Descriptor
9.7
Section Descriptor
9.8
Translating Section References
9.9
Level Two Descriptor
9.10
Translating Small Page References
9.11
Translating Large Page References
9.12
MMU Faults and CPU Aborts
9.13
Fault Address and Fault Status Registers (FAR and FSR)
9.14
Domain Access Control
9.15
Fault Checking Sequence
9.16
External Aborts
9.17
Interaction of the MMU, IDC and Write Buffer
9.18
Effect of Reset
Bus interface
10.1
Introduction
10.2
ARM610 Cycle Speed
Coprocessor Data Transfers (LDC, STC)
Coprocessor Register Transfers (MRC, MCR)
Undefined Instruction
Instruction Set Examples
4-49
4-53
4-55
4-56
5-1
5-2
5-2
5-2
6-1
6-2
6-2
6-2
6-2
6-3
6-3
6-4
7-1
7-2
7-2
7-2
8-1
8-2
9-1
9-2
9-2
9-3
9-4
9-5
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-11
9-13
9-14
9-16
9-17
9-18
10-1
10-2
10-2
5
6
7
8
9
10
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P610ARM-KW 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor