參數(shù)資料
型號: P610ARM-B
廠商: Zarlink Semiconductor Inc.
英文描述: General purpose 32-bit microprocessor
中文描述: 通用32位微處理器
文件頁數(shù): 31/173頁
文件大?。?/td> 897K
代理商: P610ARM-B
Instruction Set - Summary
ARM610 Data Sheet
4-3
O
4.1.2 Instruction summary
Mnemonic
Instruction
Action
See Section:
ADC
Add with carry
Rd := Rn + Op2 + Carry
4.4
ADD
Add
Rd := Rn + Op2
4.4
AND
AND
Rd := Rn AND Op2
4.4
B
Branch
R15 := address
4.3
BIC
Bit Clear
Rd := Rn AND NOT Op2
4.4
BL
Branch with Link
R14 := R15, R15 := address
4.3
CDP
Coprocessor Data Process-
ing
(Coprocessor-specific)
4.12
CMN
Compare Negative
CPSR flags := Rn + Op2
4.4
CMP
Compare
CPSR flags := Rn - Op2
4.4
EOR
Exclusive OR
Rd := (Rn AND NOT Op2)
OR (op2 AND NOT Rn)
4.4
LDC
Load coprocessor from
memory
Coprocessor load
4.13
LDM
Load multiple registers
Stack manipulation (Pop)
4.9
LDR
Load register from memory
Rd := (address)
4.7, 4.8
MCR
Move CPU register to
coprocessor register
cRn := rRn {<op>cRm}
4.14
MLA
Multiply Accumulate
Rd := (Rm * Rs) + Rn
4.6
MOV
Move register or constant
Rd : = Op2
4.4
MRC
Move from coprocessor
register to CPU register
Rn := cRn {<op>cRm}
4.14
MRS
Move PSR status/flags to
register
Rn := PSR
4.5
MSR
Move register to PSR
status/flags
PSR := Rm
4.5
MUL
Multiply
Rd := Rm * Rs
4.6
MVN
Move negative register
Rd := 0xFFFFFFFF EOR Op2
4.4
ORR
OR
Rd := Rn OR Op2
4.4
RSB
Reverse Subtract
Rd := Op2 - Rn
4.4
Table 4-1: The ARM Instruction set
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