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參數(shù)資料
| 型號(hào)： | P610ARM-B |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | General purpose 32-bit microprocessor |
| 中文描述： | 通用32位微處理器 |
| 文件頁(yè)數(shù)： | 18/173頁(yè) |
| 文件大?。?/td> | 897K |
| 代理商： | P610ARM-B |
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Programmer’s Model
ARM610 Data Sheet
3-2
3.1
Introduction
ARM610 supports a variety of operating configurations. Some are controlled by
register bits and are known as the
register configurations
software and these are known as
operating modes
. Others may be controlled by
.
3.2
Register Configuration
The ARM610 processor provides 4 register configurations which may be changed
while the processor is running and which are detailed in
·
Chapter 4, Instruction Set.
The bigend bit, in the Control Register, sets whether the
memory as being stored in big-endian or little-endian format, see
Configuration
. Memory is viewed as a linear collection of bytes numbered upwards
from zero. Bytes 0 to 3 hold the first stored word, bytes 4 to 7 the second and so on.
ARM610 treats words in
·
Chapter 5,
In the little-endian scheme the lowest numbered byte in a word is considered to be the
least significant byte of the word and the highest numbered byte is the most significant.
Byte 0 of the memory system should be connected to data lines 7 through 0 (
in this scheme.
D[7:0]
)
In the big-endian scheme the most significant byte of a word is stored at the lowest
numbered byte and the least significant byte is stored at the highest numbered byte.
Byte 0 of the memory system should therefore be connected to data lines 31 through
24 (
D[31:24]
).
The lateabt bit in the Control Register, see
processor's behaviour when a data abort exception occurs. It only affects the
behaviour of load/store register instructions and is discussed more fully in
3, Programmer’s Model
and
·
Chapter 4, Instruction Set
·
Chapter 5, Configuration
, sets the
·
Chapter
.
The other two configuration bits, prog32 and data32 are used for backward
compatibility with earlier ARM processors (see appendix A-1) but should normally be
set to 1. This configuration extends the address space to 32 bits, introduces major
changes in the programmer's model as described below and provides support for
running existing 26-bit programs in the 32-bit environment. This mode is
recommended for compatibility with future ARM processors and all new code should
be written to use only the 32-bit operating modes.
Because the original ARM instruction set has been modified to accommodate 32-bit
operation, there are certain additional restrictions which programmers must be aware
of. These are indicated in the text by the words shall and shall not. Reference should
also be made to the
ARM Application Notes “Rules for ARM Code Writers”
for ARM Code Writers”
available from your supplier.
and
“Notes
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P610ARM-KG | General purpose 32-bit microprocessor |
| P610ARM-KW | General purpose 32-bit microprocessor |
| P6121-AU120 | Incremental Encoders |
| P6111-AP120 | Incremental Encoders |
| P6111-AP192 | Incremental Encoders |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P610ARM-B/KG/FPNR | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|QFP|144PIN|PLASTIC |
| P610ARM-B/KW/FPNR | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|QFP|144PIN|PLASTIC |
| P610ARM-FPNR | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor |
| P610ARM-KG | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor |
| P610ARM-KW | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor |
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