參數(shù)資料
型號: PC755BMZFU400LD
英文描述: MICROPROCESSOR|32-BIT|CMOS|BGA|360PIN|PLASTIC
中文描述: 微處理器| 32位|的CMOS | BGA封裝| 360PIN |塑料
文件頁數(shù): 32/48頁
文件大?。?/td> 276K
代理商: PC755BMZFU400LD
32/48
PC755B/745B
Figure 15 shows the L2 bus input timing diagrams for the PC755B.
L2SYNC_IN
L2 DATA AND DATA
PARITY INPUTS
VM
VM = Midpoint Voltage (L2OVDD/2)
tL2CR
tL2CF
tDVL2CH
tDXL2CH
Figure 15 : L2 Bus Input Timing Diagrams
Figure 16 shows the L2 bus output timing diagrams for the PC755B.
L2SYNC_IN
ALL OUTPUTS
VM
VM = Midpoint Voltage (L2OVDD/2)
VM
L2DATA BUS
tL2CHOV
tL2CHOX
tL2CHOZ
Figure 16 : L2 Bus Output Timing Diagrams
Figure 17 provides the AC test load for L2 interface of the PC755B.
OUTPUT
L2OVdd/2
RL = 50
Z0 = 50
Figure 17 : AC Test Load for the L2 Interface
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