
PEB 22554
Pin Descriptions E1
Semiconductor Group
21
09.98
4 -7,
14 -17,
22 - 25,
32 - 35
RP(A-D)1
RP(A-D)2
RP(A-D)3
RP(A-D)4
I/O + PU
I + PU
O
O
Receive Multifunction Port A-D
Depending on programming of bits PC(1-
4).RPC(2-0) this multifunction ports carries
information to the system interface or from the
system to the QuadFALC. After Reset these
ports are configured to inputs. With the
selection of the pinfunction the in/output
configuration is also achieved. Depending on bit
SIC3.RESR all outputs / inputs of the receive
system interface are updated / sampled with the
rising or falling edge of SCLKR.
Synchronous Pulse Receive (SYPR)
Defines the beginning of time-slot 0 at system
highway port RDO in conjunction with the
values of registers RC0/1. In system interface
multiplex mode SYPR has to be provided at
port RPA1 for all 4 channels and defines the
beginning of time-slot 0 on port RDO1/RSIG1.
Enabled with PC(1-4).RPC(2-0) = 000 (reset
configuration).
Pulse Cycle: Integer multiple of 125
μ
s.
Receive Frame Marker (RFM)
Enabled with PC(1-4).RPC(2-0) = 001.
CMR2.IRSP = 0: The receive frame marker
could be active high for a 2.048 MHz period
during any bit position of the current frame.
IProgramming is done with registers RC1/0.
CMR2.IRSP = 1: Internal generated frame
synchronization pulse generated by the DCO-R
circuitry. Together with registers RC1/0 the
frame begin on the receive system interface is
defined. This frame synchronization pulse is
active low 2.048 MHz period.
Receive Multiframe Begin (RMFB)
Enabled with PC(1-4).RPC(2-0) = 010.
RMFB marks the beginning of every received
multiframe (RDO). Optionally the time-slot 16
CAS multiframe begin could be marked
(SIC3.CASMF). Active high for one 2.048 MBit/s
period.
Pin Definitions and Function
(cont’d)
Pin No.
Symbol
Input (I)
Output (O)
Function