參數(shù)資料
型號: pentium III CPU
廠商: Intel Corp.
英文描述: Pentium III Processor for the SC242 at 450MHz to 1.0GHz(SC242工作頻率450MHZ到1GHZ奔III處理器)
中文描述: 奔騰III處理器在450MHz至1.0GHz的(SC242工作頻率至450MHz到1GHz的奔三處理器的SC242)
文件頁數(shù): 21/102頁
文件大?。?/td> 920K
代理商: PENTIUM III CPU
Datasheet
21
Pentium
III Processor for the SC242 at 450 MHz to 1.0 GHz
NOTES:
1. The BR0# pin is the only BREQ# signal that is bidirectional. The internal BREQ# signals are mapped onto
BR# pins after the agent ID is determined. See
Section 7.0
for more information.
2. See
Section 7.0
for information on the PWRGOOD signal.
3. See
Section 7.0
for information on the SLP# signal.
4. See
Section 7.0
for information on the THERMTRIP# signal.
5. These signals are specified for 2.5 V operation.
6. V
CCCORE
is the power supply for the processor core.
V
CCL2
/V
CC3.3
is described in
Section 2.3
.
VID[4:0] is described in
Section 2.6
.
V
TT
is used to terminate the system bus and generate VREF on the processor substrate.
V
SS
is system ground.
TESTHI should be connected to 2.5 V with a 1 k
–10 k
resistor.
V
CC5
is not connected to the Pentium
III processor core. This supply is used for the test equipment and
tools.
SLOTOCC# is described in
Section 7.0
.
BSEL[1:0] is described in
Section 2.8.2
and
Section 7.0
.
EMI pins are described in
Section 7.0
.
THERMDP, THERMDN are described in
Section 7.0
.
2.8.1
Asynchronous vs. Synchronous for System Bus Signals
All AGTL+ signals are synchronous to BCLK. All of the CMOS, Clock, APIC, and TAP signals
can be applied asynchronously to BCLK.
All APIC signals are synchronous to PICCLK. All TAP signals are synchronous to TCK.
Table 4. System Bus Signal Groups
Group Name
Signals
AGTL+ Input
BPRI#, BR1#, DEFER#, RESET#, RS[2:0]#, RSP#, TRDY#
AGTL+ Output
PRDY#
AGTL+ I/O
A[35:3]#, ADS#, AERR#, AP[1:0]#, BERR#, BINIT#, BNR#, BP[3:2]#, BPM[1:0]#,
BR0#
1
, D[63:0]#, DBSY#, DEP[7:0]#, DRDY#, HIT#, HITM#, LOCK#, REQ[4:0]#, RP#
CMOS Input
5
A20M#, FLUSH#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PREQ#, PWRGOOD
2
,
SMI#, SLP#
3
, STPCLK#
CMOS Output
5
FERR#, IERR#, THERMTRIP#
4
System Bus Clock
BCLK
APIC Clock
PICCLK
APIC I/O
5
PICD[1:0]
TAP Input
5
TCK, TDI, TMS, TRST#
TAP Output
5
TDO
Power/Other
6
V
CCCORE
, V
CCL2
/V
CC3.3
, V
CC5
, VID[4:0], V
TT
, V
SS
, SLOTOCC#, THERMDP, THERMDN,
BSEL[1:0], EMI, TESTHI, Reserved
相關(guān)PDF資料
PDF描述
pentium III processor 32 bit Processor Mobile Module(32 位帶移動模塊處理器)
Pentium OverDrive Processor Pentium OverDrive Processor With MMX Technology For Pentium Processor-Based System(帶MMX技術(shù)奔騰超速轉(zhuǎn)動處理器)
pentium pro processor Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器)
pentium processor with MMX 32-bit processor with MMX technology(32位帶MMX技術(shù)處理器)
pentium processor 32 Bit Processor With MMX And Mobile Module(32位帶移動模塊和MMX技術(shù)CPU)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P-ENV568K3G3 制造商:Panasonic Industrial Company 功能描述:TUNER
PEO14012 制造商:TE Connectivity 功能描述:RELAY SPCO 12VDC
PEO14024 制造商:TE Connectivity 功能描述:RELAY SPCO 24VDC
PEO96742 制造商:Delphi Corporation 功能描述:ASM TERM
PEOODO3A 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint