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參數(shù)資料
| 型號(hào)： | PI7C9X20303ULAZPE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 50/77頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE PACKET SWITCH 132TQFN |
| 標(biāo)準(zhǔn)包裝： | 168 |
| 系列： | UltraLo™ |
| 應(yīng)用： | 封裝開關(guān)，3 端口/3 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 132-VFQFN 雙排裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 132-TQFN-EP（10x10） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20303UL
3Port-3Lane PCI Express Switch
UltraLo
TM Family
Datasheet
Page 54 of 77
August 2009 – Revision 1.1
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
25:20
Negotiated Link
Width
RO
Indicates the negotiated width of the given PCIe link.
Reset to 000001b (x1).
26
Training Error
RO
When set, indicates a Link training error occurred.
This bit is cleared by hardware upon successful training of the link to the L0
link state.
Reset to 0b.
27
Link Training
RO
When set, indicates the link training is in progress. Hardware clears this bit
once link training is complete.
Reset to 0b.
28
Slot Clock
Configuration
HwInt
0b: the Switch uses an independent clock irrespective of the presence of a
reference on the connector
1b: the Switch uses the same reference clock that the platform provides on the
connector
The default value may be changed by the status of strapped pin, SMBus, or
auto-loading from EEPROM.
Reset to 0b.
29
Data Link Layer
Link Active
RO
Indicates the status of the Data Link Control and Management State Machine.
It returns a 1b to indicate the DL_Active state, 0b otherwise.
Reset to 0b.
31:30
Reserved
RO
Reset to 00b.
7.2.73
SLOT CAPABILITIES REGISTER (Downstream Port Only) – OFFSET F4h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Attention Button
Present
RO
When set, it indicates that an Attention Button is implemented on the chassis
for this slot. The default value may be changed by SMBus or auto-loading
from EEPROM.
Reset to 0b.
1
Power Controller
Present
RO
When set, it indicates that a Power Controller is implemented for this slot.
The default value may be changed by SMBus or auto-loading from
EEPROM.
Reset to 0b.
2
Reserved
RO
Reset to 0b.
3
Attention Indicator
Present
RO
When set, it indicates that an Attention Indicator is implemented on the
chassis for this slot. The default value may be changed by SMBus or auto-
loading from EEPROM.
Reset to 0b.
4
Power Indicator
Present
RO
When set, it indicates that a Power Indicator is implemented on the chassis
for this slot. The default value may be changed by SMBus or auto-loading
from EEPROM.
Reset to 0b.
5
Hot-Plug Surprise
RO
When set, it indicates that a device present in this slot might be removed from
the system without any prior notification. The default value may be changed
by SMBus or auto-loading from EEPROM.
Reset to 0b.
6
Hot-Plug Capable
HwInt
When set, it indicates that this slot is capable of supporting Hot-Plug
operation. The default value may be changed by the status of strapped pin or
auto-loading from EEPROM.
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