參數(shù)資料
型號: PM73488
廠商: PMC-SIERRA INC
元件分類: 數(shù)字傳輸電路
英文描述: 5 Gbit/s ATM Switch Fabric Element
中文描述: ATM SWITCHING CIRCUIT, PBGA596
封裝: EPBGA-596
文件頁數(shù): 25/135頁
文件大?。?/td> 1735K
代理商: PM73488
PMC-Sierra, Inc.
PM73488 QSE
L
PMC-980616
Issue 3
5 Gbit/s ATMSwitch Fabric Element
Released
Datasheet
27
2.4
There are 64 internal cell buffers for multicast traffic. These buffers are shared among three multicast priorities: high,
medium, and low. These 64 buffers are grouped into two sets of 32-cell buffers each. One set is dedicated to ports 0
to 15, the other set to ports 16 to 32.
Multicast Cell Flow
A multicast queue engine dynamically allocates the cell buffers to incoming multicast cells. Each cell is buffered
until it can be sent out on all output ports to which it should be routed. These output ports are designated by a Multi-
cast Group Vector (MGV) that is associated with a Multicast Group Index (MGI) carried by each multicast cell. Each
QSE holds multicast MGVs in an MGV RAM. The QSE has internal RAM to support up to 128 MGVs. This support
can be extended up to 256K MGVs by using an external MGV RAM.
Each multicast cell contains the RAM address of the MGV it is supposed to use. When a multicast cell is received, its
MGV is fetched from RAM and copied to the MULTICAST_QUEUE_COMPLETION register. The
MULTICAST_QUEUE_COMPLETION register tracks to which QSE ports the cell needs to be sent before its cell
buffer can be cleared. In a multistage QSE fabric, each multicast cell will look up MGVs at each QSE. The MGV’s
sequence determines which output ports will finally receive the cell. The MGV structure allows software to create an
optimal distribution tree for each multicast cell.
Multicast operation can be best understood by considering the QSE multicast path as two separate engines; the multi-
cast queue engine and the multicast dequeue engine. The multicast queue engine queues cells into the multicast cell
buffers (of which there are 64), and issues backpressure on the BP_ACK_OUT(31:0) lines. The multicast dequeue
engine selects and dequeues cells from the buffers for output ports as guided by the backpressure received on the
BP_ACK_IN(31:0) lines.
Figure 14. Routing Bits Rotation for Unicast Traffic, Gang Mode of Four
Bit Mapping
TAG_1
TAG_2
TAG_3
TAG_4
TAG_5
TAG_6
TAG_7
TAG_1
TAG_2
TAG_3
TAG_4
TAG_5
TAG_6
TAG_7
TAG_0
3 2 1 0
3 2 1 0
TAG_0
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