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STANDARD PRODUCT
PM8315 TEMUX
DATASHEET
PMC-1981125
ISSUE 7
HIGH DENSITY T1/E1 FRAMER WITH
INTEGRATED VT/TU MAPPER AND M13 MUX
PROPRIETARY AND CONFIDENTIAL
280
TH
TDATI
TDATI to TICLK Hold Time (LOOPT = 0)
TDATI to RCLK Hold Time (LOOPT = 1)
(See Note 2)
1
1
ns
TP
TFPO
TICLK High to TPFO Prop Delay
(See Note 3 and 4)
2
16
ns
TS
TGAP
TDATI to TGAPCLK Set-up Time
(See Notes 1 and 5)
3
ns
TH
TGAP
TDATI to TGAPCLK Hold Time
(See Note 2 and 5)
2
ns
TP
TCLK
TICLK Edge to TCLK Edge Prop Delay
(See Notes 3 and 4)
2
13
ns
TP
TPOS
TCLK Edge to TPOS/TDAT Prop Delay
(See Notes 3 and 4)
-1
5
ns
TP
TNEG
TCLK Edge to TNEG/TMFP Prop Delay
(See Notes 3 and 4)
-1
5
ns
tP
TPOS2
TICLK High to TPOS/TDAT Prop Delay
(See Notes 3 and 4)
2
13
ns
TP
TNEG2
TICLK High to TNEG/TMFP Prop Delay
(See Notes 3 and 4)
2
13
ns
Notes on DS3 Transmit Interface Timing:
1. When a set-up time is specified between an input and a clock, the set-up
time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4
Volt point of the clock.
2. When a hold time is specified between an input and a clock, the hold time is
the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt
point of the input.
3. Output propagation delay time is the time in nanoseconds from the 1.4 Volt
point of the reference signal to the 1.4 Volt point of the output.
4. Maximum and minimum output propagation delays are measured with a 20
pF load on all the outputs.
5.
aTGAPCLK.
Setup and hold times relative to TGAPCLK are measured with a 20 pF load on