參數(shù)資料
型號: PONE-000-01
廠商: Electronic Theatre Controls, Inc.
英文描述: The ideal device for simple nodes, such as switches, actuators and sensor
中文描述: 在簡單的節(jié)點(diǎn),如交換機(jī),執(zhí)行器和傳感器的理想設(shè)備
文件頁數(shù): 14/56頁
文件大?。?/td> 432K
代理商: PONE-000-01
March 2000
CEWay
PL-One Data Sheet
D-CW-0100-04
Page 14 of 56
Current State
Next State
Ph_Confirm
_Reg
1000 0000
Transition
RCV_PRE_SYM
RCV_PRE_SYM
Detection of INFERIOR or SUPERIOR state
and
1) if current state is INFERIOR, the number
of consecutive INFERIORs is < 5, or
2) if current state is SUPERIOR, it is of the
same phase as the first SUPERIOR.
Detection of 5 consecutive INFERIORs.
Detection of opposite phase SUPERIOR after
previously detecting 7 or 8 consecutive
SUPERIORs.
Detection of opposite phase SUPERIOR after
previously detecting between 3 and 6
(inclusive) consecutive SUPERIORs.
Jabber error.
Detection of EOP and valid data in
Ph_Rx_Buffer.
Detection of EOP and no data in
Ph_Rx_Buffer.
Detection of data and 8 valid data bits in
Ph_Rx_Buffer.
Detection of EOF and valid data in
Ph_Rx_Buffer.
Detection of EOF and no data in
Ph_Rx_Buffer.
Detection of INFERIOR, as a result of carrier
loss.
Jabber error.
Received 16 CRC bits to report CRC status.
Detection of INFERIOR prior to all 16 CRC
bits, as a result of carrier loss.
Jabber error.
After each timestamp byte is uploaded.
Collision detected.
Transmission of Preamble completed.
Jabber error.
Buffer empty.
Start transmission of CRC. No interrupt is
generated.
Jabber error.
Transmission of CRC completed.
Jabber error.
After each timestamp byte is uploaded.
RCV_PRE_SYM
RCV_PRE_SYM
IDLE
0100 0000
1011 0110
RCV_SYM
RCV_PRE_SYM
RCV_SYM
1111 0110
RCV_PRE_SYM
RCV_SYM
RCV_PRE_SYM
RCV_CRC
XXXX XXX1
1011 0100
RCV_SYM
RCV_CRC
1010 0100
RCV_SYM
RCV_SYM
1011 0000
RCV_SYM
RCV_SYM
1011 0010
RCV_SYM
RCV_SYM
1010 0010
RCV_SYM
RCV_SYM
0110 0000
RCV_SYM
RCV_CRC
RCV_CRC
RCV_SYM
RCV_STAMP
RCV_CRC
XXXX XXX1
1011 X100
0110 0000
RCV_CRC
RCV_STAMP
XMIT_PRE_SYM
XMIT_PRE_SYM
XMIT_PRE_SYM
XMIT_SYM
XMIT_SYM
RCV_CRC
RCV_STAMP
RCV_PRE_SYM
XMIT_SYM
XMIT_PRE_SYM
XMIT_SYM
XMIT_CRC
XXXX XXX1
1011 0100
1010 0000
0001 0000
XXXX XXX1
0001 0000
XMIT_SYM
XMIT_CRC
XMIT_CRC
XMIT_STAMP
XMIT_SYM
XMIT_STAMP
XMIT_CRC
XMIT_STAMP
XXXX XXX1
0001 0000
XXXX XXX1
0001 0000
Table 7 State Transitions Associated with PLSES Handshake Interrupts
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