參數(shù)資料
型號(hào)： PONE-000-01
廠商： Electronic Theatre Controls, Inc.
英文描述： The ideal device for simple nodes, such as switches, actuators and sensor
中文描述： 在簡(jiǎn)單的節(jié)點(diǎn)，如交換機(jī)，執(zhí)行器和傳感器的理想設(shè)備
文件頁(yè)數(shù)： 45/56頁(yè)
文件大小： 432K
代理商： PONE-000-01
March 2000
CEWay
PL-One Data Sheet
D-CW-0100-04
Page 45 of 56
INSTRUCTION DEFINITIONS
The M8052 instruction set is shown in Table 17 and some of the features supported are outlined below.
Addressing Modes
The set provides a variety of addressing modes which are outlined below.
Direct Addressing
In direct addressing, the operand is specified by an 8-bit address field. Only internal data and SFRs may be
accessed using this mode.
Indirect Addressing
In indirect addressing, the operand is specified by an address contained in a register. Two registers (R0
and R1) from the current bank, or the DPTR may be used for addressing in this mode. Both internal and
external data memory may be indirectly addressed.
Register Addressing
In register addressing, the operand is specified by the top 3 bits of the opcode, which selects one of the
current bank of registers. Four banks of registers are available. The current bank is selected by bits in the
PSW.
Register Specific Addressing
Some instructions only operate on specific registers, and this may be defined in the opcode. In particular,
some accumulator operations and some pointer operations are defined in this manner.
Immediate Data
Instructions which use immediate data are 2 bytes long or over, and the immediate operand is stored in
program memory as part of the instruction.
Indexed Addressing
Only program memory may be addressed using indexed addressing. It is intended for simple
implementation of lookup tables. A 16-bit base register (either the PC or the DPTR) is combined with an
offset stored in the accumulator to access data in program memory.
Arithmetic Instructions
The M8052 implements ADD, ADDC (Add with Carry), SUBB (Subtract with Borrow), INC (Increment) and
DEC (Decrement) functions, which may be used in most addressing modes. There are three accumulator
specific instructions, DA A (Decimal Adjust A), MUL AB (Multiply A by B) and DIV AB (Divide A by B).
Logical Instructions
The M8052 implements ANL (AND Logical), ORL (OR Logical) and XRL (Exclusive-OR Logical) functions,
which again may be used in most addressing modes. There are seven accumulator specific instructions,
CLR A (Clear A), CPL A (Complement A), RL A (Rotate Left A), RLC A (Rotate Left through Carry A), RR A
(Rotate Right A), RRC A (Rotate Right through Carry A) and SWAP A (Swap Nibbles of A).
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