參數(shù)資料
型號(hào): PSD813F
廠商: 意法半導(dǎo)體
英文描述: Flash In-System-Programmable Microcontroller Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲(chǔ)器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程微控制器外圍設(shè)備(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬(wàn)位閃速存儲(chǔ)器,256K位的EEPROM,16K的位的SRAM)
文件頁(yè)數(shù): 33/130頁(yè)
文件大?。?/td> 650K
代理商: PSD813F
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Prelimnary
PSD813F Famly
29
The
PSD813F
Functional
Blocks
(cont.)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot
Sec6_Prot
Sec5_Prot
Sec4_Prot
Sec3_Prot
Sec2_Prot
Sec1_Prot Sec0_Prot
Flash Protection Register
9.1.1.9.2 Reset Instruction
The Reset instruction resets the internal memory logic state machine in a few milliseconds.
Reset is an instruction of either one write operation or three write operations (refer to
Table 9).
9.1.1.9.3 Programmng and Erasing the Boot Blocks in PSD813F2 and PSD813F4
There are two different algorithms for programming and erasing the Boot Blocks in the
PSD813F2 and F4 (Boot Blocks are selected by CSBOOTi). The selection of the correct
algorithm is based on the internal die of the PSD device, which can be identified based on
the Flash Memory Identifier read by the MCU. Using the Read Flash Identifier instruction
(Table 9), the MCU will read one of two IDs for the PSD813F2 and PSD813F4, as shown in
Table 12.
Bit Definitions:
Sec<i>_Prot
Sec<i>_Prot
PSD/EE Protection Register
1 = Flash or Flash Boot Sector <i> is write protected.
0 = Flash or Flash Boot Sector <i> is not write protected.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Security_
Bit
*
*
*
Sec3_Prot
Sec2_Prot
Sec1_Prot Sec0_Prot
Bit Definitions:
Sec<i>_Prot
Sec<i>_Prot
Security_Bit
1 = EEPROM or Flash Boot Sector <i> is write protected.
0 = EEPROM or Flash Boot Sector <i> is not write protected.
0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
Device
Flash ID
E3h
E4h
Boot Block Algorithm
EEPROM Algorithm (See Section 9.1.1.6)
Flash Algorithm (See Section 9.1.1.7)
PSD813F2 and F4
PSD813F2 and F4
Table 12. Flash Memory IDValues for PSD813F2 and F4
For users of the PSD813F2 and F4, the MCU system software must make both algorithms
available. Within the routine that programs or erases the Boot Block area, the MCU should
use the Flash Memory Identifier first to select the appropriate algorithm. If the Identifier is
E4h, then it should treat the Boot Block area as Flash memory. If the Identifier is E3h, then
the MCU should treat the Boot Block area as EEPROM. This will ensure compatibility with
all future PSD813F2 and F4 devices.
Note:
The MCU must not operate out of Main Flash while reading the Flash Memory
Identifier. It can execute the Flash Memory Identifier command from some other memory,
and store the ID value for later use.
This algorithm selection method only applies to the PSD813F2 and F4. The PSD813F1 will
always use the EEPROM algorithm for the Boot Block area. The PSD813F3 and F5 have
no Boot Block area.
Note that this algorithm selection method is not required when programming or erasing the
main Flash memory. It only applies to programming or erasing the Boot Block area.
Main Flash will always require the Flash algorithm defined in section 9.1.1.7, regardless of
internal die composition.
Table 11. Sector Protection/Security Bit Definition
*:
Not used.
相關(guān)PDF資料
PDF描述
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