參數(shù)資料
型號: PSD813F
廠商: 意法半導(dǎo)體
英文描述: Flash In-System-Programmable Microcontroller Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程微控制器外圍設(shè)備(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬位閃速存儲器,256K位的EEPROM,16K的位的SRAM)
文件頁數(shù): 67/130頁
文件大?。?/td> 650K
代理商: PSD813F
Prelimnary
PSD813F Famly
63
The
PSD813F
Functional
Blocks
(cont.)
9.4.4 Port Data Registers
The Port Data Registers, shown in Table 28, are used by the microcontroller to write data
to or read data from the ports. Table 28 shows the register name, the ports having each
register type, and microcontroller access for each register type. The registers are described
below.
9.4.4.1 Data In
Port pins are connected directly to the Data In buffer. In MCU I/O input mode, the pin input
is read through the Data In buffer.
9.4.4.2 Data Out Register
Stores output data written by the MCU in the MCU I/O output mode. The contents of the
Register are driven out to the pins if the Direction Register or the output enable product
term is set to “1”. The contents of the register can also be read back by the microcontroller.
9.4.4.3 Output Micro
Cells (OMCs)
The CPLD OMCs occupy a location in the microcontroller’s address space. The
microcontroller can read the output of the OMCs. If the Mask Micro
Cell Register bits are
not set, writing to the Micro
Cell loads data to the Micro
Cell flip flops. Refer to the PLD
section for more details.
9.4.4.4 Mask Micro
Cell Register
Each Mask Register bit corresponds to an OMC flip flop. When the Mask Register bit
is set to a “1”, loading data into the OMC flip flop is blocked. The default value is “0” or
unblocked.
9.4.4.5 Input Micro
Cells (IMCs)
The IMCs can be used to latch or store external inputs. The outputs of the IMCs
are routed to the PLD input bus, and can be read by the microcontroller. Refer to the PLD
section for a detailed description.
9.4.4.6 Enable Out
The Enable Out register can be read by the microcontroller. It contains the output enable
values for a given port. A “1” indicates the driver is in output mode. A “0” indicates the driver
is in tri-state and the pin is in input mode.
Register Name
Port
MCUAccess
Data In
A,B,C,D
Read – input on pin
Data Out
A,B,C,D
Write/Read
Output Micro
Cell
A,B,C
Read – outputs of Micro
Cells
Write – loading Micro
Cells Flip-Flop
Mask Micro
Cell
A,B,C
Write/Read – prevents loading into a given
Micro
Cell
Read – outputs of the Input Micro
Cells
Input Micro
Cell
A,B,C
Enable Out
A,B,C
Read – the output enable control of the port driver
Table 28. Port Data Registers
相關(guān)PDF資料
PDF描述
PSD813FH(中文) Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
PSD813FN(中文) Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
PSD813FN Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
PSD813FH Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
PSD82 Three Phase Rectifier Bridges
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