參數(shù)資料
型號： RIVA 128ZX
廠商： 意法半導(dǎo)體
英文描述： 128-Bit 3D Multimedia Accelerator(128位3D多媒體加速器)
中文描述： 128位3D多媒體加速器（128位三維多媒體加速器）
文件頁數(shù)： 69/85頁
文件大?。?/td> 608K
代理商： RIVA 128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128ZX
69/85
APPENDIX
Descriptions of register contents includean indication if register fields are readable
(R)
or writable(
W
) and
the initial power-on or reset value of the field(
I
). ‘-’ indicates not readable / writable,X indicates an inde-
terminate value, hence I=X indicates register or field not reset.
A
This section describesthe 256 byte PCIconfiguration spaces asimplemented by the RIVA128ZX. Asingle
PCI VGA device is defined by the RIVA128ZX which decodes and acknowledges the first 256 bytes of the
configuration addressspace. The RIVA128ZX does not respond (doesnot assert
DEVSEL#
) for functions
1-7.
PCI CONFIGURATION REGISTERS
A.1
REGISTER DESCRIPTIONS FOR PCI CONFIGURATION SPACE
Byte offsets 0x03 - 0x00
Device Identification Register (0x03 - 0x02)
Vendor Identification Register (0x01 - 0x00)
0x03
0x02
0x01
0x00
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
D
V
Bits
Function
R W I
31:16
The DEVICE_ID_CHIP bits contain the chip number allocated by the manu-
facturer to identify the particular device.
= 0x0018 if the power-on reset configuration APCI Supported bit = 0
= 0x0019 if the power-on reset configuration APCI Supported bit = 1
R - X
Bits
Function
R W I
15:0
VENDOR_ID bits allocated by the PCI Special Interest Group to uniquely
identify the manufacturer of the device.
NVIDIA/STMicroelectronics Vendor ID = 0x12D2 (4818)
R - X
相關(guān)PDF資料
PDF描述
RIVA128ZX 128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128 RIVA 128⑩ 128-BIT 3D MULTIMEDIA ACCELERATOR
RIX-0142-H FILTER IEC EINGANG ULTRA KOMPAKT 1A
RIX-0342-H FILTER IEC EINGANG ULTRA KOMPAKT 3A
RIX-0642-H FILTER IEC EINGANG ULTRA KOMPAKT 6A
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