參數(shù)資料
型號: RIVA 128ZX
廠商: 意法半導(dǎo)體
英文描述: 128-Bit 3D Multimedia Accelerator(128位3D多媒體加速器)
中文描述: 128位3D多媒體加速器(128位三維多媒體加速器)
文件頁數(shù): 84/85頁
文件大?。?/td> 608K
代理商: RIVA 128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128ZX
84/85
Byte offsets 0x67 - 0x64
Power Management Control/Status Register (0x67 - 0x64)
Byte offset 0xFF - 0x50
0x67
0x66
0x65
0x64
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
P
Bits
Function
R W I
31:2
Reserved
R - 0
1:0
POWER_STATE
RIVA128ZX. Two power states are supported D0 (full power) and D3hot (low
power).
0x0 = D0
0x3 = D3hot
The RIVA128ZX does not physically change its power consumption when
POWER_STATE is modified. The device can be transitioned from D3 to D0
either by writing to this register or by applying a hard reset to the
PCIRST#
pin.
indicates
and
controls
the current
power
state of
R W 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved = 0x00000000
相關(guān)PDF資料
PDF描述
RIVA128ZX 128-BIT 3D MULTIMEDIA ACCELERATOR
RIVA128 RIVA 128⑩ 128-BIT 3D MULTIMEDIA ACCELERATOR
RIX-0142-H FILTER IEC EINGANG ULTRA KOMPAKT 1A
RIX-0342-H FILTER IEC EINGANG ULTRA KOMPAKT 3A
RIX-0642-H FILTER IEC EINGANG ULTRA KOMPAKT 6A
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