RTL8309SB
Datasheet
Single-Chip 9-Port 10/100Mbps Switch Controller
xv
Track ID: JATR-1076-21 Rev. 1.4
List of Figures
Figure 1. Block Diagram .............................................................................................................................4
Figure 2. Pin Assignments...........................................................................................................................5
Figure 3. MII Port Application ..................................................................................................................71
Figure 4. MII Port Operating Mode Overview..........................................................................................72
Figure 5. VLAN Grouping Example .........................................................................................................75
Figure 6. Tagged and Untagged Packet Forwarding When 802.1Q Tag Aware VLAN is Disabled .........76
Figure 7. ISP MAC Outbound Process......................................................................................................80
Figure 8. ISP MAC Inbound Process.........................................................................................................80
Figure 9. Input Drop vs. Output Drop .......................................................................................................82
Figure 10. Start and Stop Definition............................................................................................................83
Figure 11. Output Acknowledge..................................................................................................................84
Figure 12. Random Read.............................................................................................................................84
Figure 13. Sequential Read..........................................................................................................................84
Figure 14. MII Port Loopback.....................................................................................................................85
Figure 15. Loop Example............................................................................................................................86
Figure 16. Floating and Pull-down of LED Pins.........................................................................................87
Figure 17. Two-Pin Bi-Color LED for SPD Floating or Pull-high..............................................................88
Figure 18. Two-Pin Bi-Color LED for SPD Pull-down...............................................................................88
Figure 19. Bi-Color LED Reference Schematic..........................................................................................89
Figure 20. Reception Data Timing of MII/SNI/SMI Interface....................................................................92
Figure 21. Transmission Data Timing of MII/SNI/SMI Interface...............................................................92
Figure 22. Cross-section of 128-Pin PQFP..................................................................................................94
Figure 23. Application for Transformer with Connected Central Tap.........................................................97
Figure 24. Bob Smith Termination..............................................................................................................98