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參數(shù)資料
| 型號： | RTL8309SB |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SINGLE-CHIP 9-PORT 10/100MBPS SWITCH CONTROLLER |
| 中文描述： | 單芯片9口10/100Mbps開關(guān)控制器 |
| 文件頁數(shù)： | 55/115頁 |
| 文件大?。?/td> | 866K |
| 代理商： | RTL8309SB |
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RTL8309SB
Datasheet
Single-chip 9-port 10/100Mbps Switch Controller
40
Track ID: JATR-1076-21 Rev. 1.4
7.
PHY Registers Description
“Mode” codes used in the following tables:
RO
RW
LL
Read Only
Read/Write
Latch Low until clear
LH
SC
Latch High until clear
Self Clearing
7.1.
PHY 0 Registers
7.1.1. PHY 0 Register 0: Control
Table 65. PHY 0 Register 0: Control
Mode
Description
RW/SC
1: PHY reset. This bit is self-clearing.
RW
1: Enable loopback. This will loopback TXD to RXD and
ignore all activity on the cable media
0: Normal operation
RW
1: 100Mbps
0: 10Mbps
When NWay is enabled, this bit reflects the result of auto-
negotiation (Read only).
When NWay is disabled, this bit is strap option
‘Force_Speed’ and can be configured through SMI
(Read/Write).
RW
1: Enable auto-negotiation process
0: Disable auto-negotiation process
This bit can be set through SMI (Read/Write).
RW
1: Power down. All functions will be disabled except SMI
function
0: Normal operation
RW
1: Electrically isolates the PHY from RMII/SMII.
PHY is still able to respond to MDC/MDIO
0: Normal operation
RW/SC
1: Restart Auto-Negotiation process
0: Normal operation
RW
1: Full duplex operation
0: Half duplex operation
When NWay is enabled, this bit reflects the result of auto-
negotiation (Read only).
When NWay is disabled, this bit is strap option
‘Force_Duplex’ and can be configured through SMI
(Read/Write).
Reg.bit
0.15
0.14
Name
Reset
Loopback
(digital loopback)
Default
0
0
0.13
Speed Select
1
0.12
Auto Negotiation
Enable
Pin
En_ANEG
strap option
0
0.11
Power Down
0.10
Isolate
0
0.9
Restart Auto
Negotiation
Duplex Mode
0
0.8
1
0.[7:0]
Reserved
0
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