RTL8309SB
Datasheet
Single-chip 9-port 10/100Mbps Switch Controller
43
Track ID: JATR-1076-21 Rev. 1.4
Reg.bit
5.6
Name
10Base-T-FD
Mode Description
RO
1: 10Base-TX full duplex supported by Link Partner
0: 10Base-TX full duplex not supported by Link Partner
Note: If auto negotiation is disabled and this bit is set, Reg0.13
will be set to 0 and Reg0.8 will be set to 1 after link is
established.
RO
1: 10Base-TX half duplex supported by Link Partner
0: 10Base-TX half duplex not supported by Link Partner
Note: If auto negotiation is disabled and this bit is set, Reg0.13
and Reg0.8 will be set to 0 after a link is established.
RO
[00001]=IEEE802.3.
Default
0
5.5
10Base-T
0
5.[4:0]
Selector Field
00001
7.1.5.
PHY 0 Register 6: Auto-Negotiation Expansion
Table 69. PHY 0 Register 6: Auto-Negotiation Expansion
Mode Description
RO
RO
1: A fault has been detected via the Parallel Detection function
0: A fault has not been detected via the Parallel Detection
function
RO
0: Link Partner is not Next Pageable (permanently=0)
Reg.bit
6.[15:5]
6.4
Name
Reserved
Parallel
Detection Fault
Default
0
0
6.3
Link Partner
Next Pageable
Local Next
Pageable
Page Received
0
6.2
RO
1: The RTL8309SB is Next Pageable
0: The RTL8309SB is not Next Pageable
1: A New Page has been received
0: A New Page has not been received
If NWay is enabled, this bit means:
1: Link Partner is Auto-Negotiation able
0: Link Partner is not Auto-Negotiation able
0
6.1
RO
0
6.0
Link Partner
Auto-
Negotiation Able
RO
0 (NWay)
or
1 (Force)
7.1.6.
PHY 0 Register 16: Global Control 0
Table 70. PHY 0 Register 16: Global Control 0
Mode Description
RW
111 -> Mode 7: Speed, Duplex+Collision, Link+Act, SQI
110 -> Mode 6: Activity, Speed, Link, SQI
101 -> Mode 5: Speed, Duplex, Link+Act, SQI
100 -> Mode 4: Collision, Duplex, Link+Act+Speed, SQI
011 -> Mode 3: SQI, Duplex+Collision,
Link+Act+Speed,10/100.
010 -> Mode 2: RxAct+10/100, TxAct+10/100, Link, SQI
001 -> Mode 1: Duplex+Collision, 10Link+Act,
100Link+Act, SQI
000 -> Mode 0: Duplex+Collision, Bi-color Speed,
Bi-color Link+Act, SQI.
RW/
SC
If this bit is set to 1, the RTL8309SB will reset all registers in it
except PHY registers and will not load configurations from
EEPROM or strapping pins. Software reset is designed to
provide a convenient way for users to change the configuration
via SMI. After changing register values in the RTL8309SB
(except PHY registers) via SMI, the external device must
execute a soft reset in order to update the configuration by
setting this bit to 1.
Reg.bit
16.[15:13] LED Mode
Name
Default
111
16.12
Software Reset
1: Soft reset. This bit is self-clearing
0