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Core Logic Module
(Continued)
5.2.10.4 Power Management Programming Summary
Table 5-9 provides a programming register summary for the
power management timers, traps, and functions. For com-
plete bit information regarding the registers listed in Table
5-9, refer to Section 5.4.1 "Bridge, GPIO, and LPC Regis-
ters - Function 0" on page 166.
Table 5-9. Device Power Management Programming Summary
Device Power
Management Resource
Located at F0 Index xxh Unless Otherwise Noted
Enable
Configuration
Second Level
SMI Status/No Clear
Second Level SMI
Status/With Clear
Traps
80h[2]
N/A
N/A
N/A
Idle Timers
80h[1]
N/A
N/A
N/A
Power Management
80h[0]
N/A
N/A
N/A
Keyboard / Mouse Idle Timer
81h[3]
93h[1:0]
85h[3]
F5h[3]
Parallel / Serial Idle Timer
81h[2]
93h[1:0]
85h[2]
F5h[2]
Floppy Disk Idle Timer
81h[1]
9Ah[15:0], 93h[7]
85h[1]
F5h[1]
Primary Hard Disk Idle Timer
81h[0]
98h[15:0], 93h[5]
85h[0]
F5h[0]
Secondary Hard Disk Idle Timer
83h[7]
ACh[15:0], 93h[4]
86h[4]
F6h[4]
User Defined Device 1 Idle
Timer
81h[4]
A0h[15:0], C0h[31:0],
CCh[7:0]
85h[4]
F5h[4]
User Defined Device 2 Idle
Timer
81h[5]
A2h[15:0], C4h[31:0],
CDh[7:0]
85h[5]
F5h[5]
User Defined Device 3 Idle
Timer
81h[6]
A4h[15:0], C8h[31:0],
CEh[7:0]
85h[6]
F5h[6]
Global Trap Enable
80h[2]
N/A
N/A
N/A
Keyboard / Mouse Trap
82h[3]
9Eh[15:0] 93h[1:0]
86h[3]
F6h[3]
Parallel / Serial Trap
82h[2]
9Ch[15:0], 93h[1:0]
86h[2]
F6h[2]
Floppy Disk Trap
82h[1]
93h[7]
86h[1]
F6h[1]
Primary Hard Disk Trap
82h[0]
93h[5]
86h[0]
F6h[0]
Secondary Hard Disk Trap
83h[6]
93h[4]
86h[5]
F6h[5]
User Defined Device 1 Trap
82h[4]
C0h[31:0], CCh[7:0]
F1BAR0+I/O
Offset 04h[2]
F1BAR0+I/O
Offset 06h[2]
User Defined Device 2 Trap
82h[5]
C4h[31:0], CDh[7:0]
F1BAR0+I/O
Offset 04h[3]
F1BAR0+I/O
Offset 06h[3]
User Defined Device 3 Trap
82h[6]
C8h[31:0], CEh[7:0]
F1BAR0+I/O
Offset 04h[4]
F1BAR0+I/O
Offset 06h[4]
General Purpose Timer 1
83h[0]
88h[7:0], 89h[7:0], 8Bh[4]
F1BAR0+I/O
Offset 04h[0]
F1BAR0+I/O
Offset 06h[0]
General Purpose Timer 2
83h[1]
8Ah[7:0], 8Bh[5,3,2]
F1BAR0+I/O
Offset 04h[1]
F1BAR0+I/O
Offset 06h[1]
Suspend Modulation
96h[0]
94h[15:0], 96h[2:0]
N/A
N/A
IRQ Speedup
80h[3]
8Ch[7:0]
N/A
N/A