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參數資料
| 型號： | SN54ABT8373 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Scan Test Devices With Octal D-Type Latches(掃描測試裝置(帶八D鎖存器)) |
| 中文描述： | 掃描測試設備與八路D類鎖存器（掃描測試裝置（帶八?鎖存器）） |
| 文件頁數： | 1/19頁 |
| 文件大小： | 391K |
| 代理商： | SN54ABT8373 |
SN54ABT8373, SN74ABT8373
SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES
SCBS487 – JULY 1994
Copyright
1994, Texas Instruments Incorporated
3–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
SCOPE
Family of Testability Products
Compatible With the IEEE Standard
1149.1-1990 (JTAG) Test Access Port
and Boundary-Scan Architecture
Functionally Equivalent to SN54/74F373
and SN54/74ABT373 in the Normal-
Function Mode
SCOPE
Instruction Set:
– IEEE Standard 1149.1-1990 Required
Instructions, Optional INTEST, CLAMP
and HIGHZ
– Parallel-Signature Analysis at Inputs
With Masking Option
– Pseudo-Random Pattern Generation
From Outputs
– Sample Inputs/Toggle Outputs
– Binary Count From Outputs
– Even-Parity Opcodes
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
Package Options Include Plastic
Small-Outline Packages (DW), Ceramic
Chip Carriers (FK), and Standard Ceramic
DIPs (JT)
description
The SN54ABT8373 and SN74ABT8373 scan test
devices with octal D-type latches are members of
the Texas Instruments SCOPE
testability
integrated circuit family. This family of devices
supports IEEE Standard 1149.1-1990 boundary
scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished
via the 4-wire test access port (TAP) interface.
In the normal mode, these devices are functionally equivalent to the SN54/74F373 and SN54/74ABT373 octal
D-type latches. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing
at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does
not affect the functional operation of the SCOPE
octal D-type latches.
In the test mode, the normal operation of the SCOPE
D-type latches is inhibited and the test circuitry is enabled
to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan
test operations as described in IEEE Standard 1149.1-1990.
Four dedicated test pins are used to control the operation of the test circuitry: test data input (TDI), test data
output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing
functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation
(PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.
The SN54ABT8373 is characterized for operation over the full military temperature range of – 55
°
C to 125
°
C.
The SN74ABT8373 is characterized for operation from –40
°
C to 85
°
C.
3 2 1
13 14
5
6
7
8
9
10
11
8D
TDI
TCK
NC
TMS
TDO
8Q
2D
1D
OE
NC
LE
1Q
2Q
4
15 16 17 18
4
G
N
5
6
7
3
4
5
N
28 27 2625
24
23
22
21
20
19
12
3
V
6
7
C
SN54ABT8373 . . . JT PACKAGE
SN74ABT8373 . . . DW PACKAGE
(TOP VIEW)
SN54ABT8373 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LE
1Q
2Q
3Q
4Q
GND
5Q
6Q
7Q
8Q
TDO
TMS
OE
1D
2D
3D
4D
5D
V
CC
6D
7D
8D
TDI
TCK
NC – No internal connection
SCOPE and EPIC-
ΙΙ
B are trademarks of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
P
相關PDF資料 |
PDF描述 |
|---|---|
| SN74ABT8373 | Scan Test Devices With Octal D-Type Latches(掃描測試裝置(帶八D鎖存器)) |
| SN54ABT8374 | Scan Test Devices With Octal D-Type Edge-Triggered Flip-Flops(掃描測試裝置(帶八D邊沿觸發(fā)器)) |
| SN74ABT8374 | Scan Test Devices With Octal D-Type Edge-Triggered Flip-Flops(掃描測試裝置(帶八D邊沿觸發(fā)器)) |
| SN54ABT845 | Octal Bus Interface D-Type Latches With 3-State Outputs(八總線接口D鎖存器(三態(tài)輸出)) |
| SN74ABT845 | Octal Bus Interface D-Type Latches With 3-State Outputs(八總線接口D觸發(fā)器(三態(tài)輸出)) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN54ABT841 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT841FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT841JT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT841W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT843 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
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