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參數(shù)資料
| 型號： | SN54ABT8373 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Scan Test Devices With Octal D-Type Latches(掃描測試裝置(帶八D鎖存器)) |
| 中文描述： | 掃描測試設備與八路D類鎖存器（掃描測試裝置（帶八?鎖存器）） |
| 文件頁數(shù)： | 16/19頁 |
| 文件大小： | 391K |
| 代理商： | SN54ABT8373 |
SN54ABT8373, SN74ABT8373
SCAN TEST DEVICES WITH OCTAL D-TYPE LATCHES
SCBS487 – JULY 1994
3–16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Note 3)
PARAMETER
TEST CONDITIONS
TA = 25
°
C
TYP
SN54ABT8373
MIN
SN74ABT8373
MIN
UNIT
MIN
MAX
MAX
MAX
VIK
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 5 V,
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 5.5 V,
VI = VCC or GND
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 0,
VCC = 5.5 V,
VCC = 5.5 V,
II = –18 mA
IOH = – 3 mA
IOH = – 3 mA
IOH = – 24 mA
IOH = – 32 mA
IOL = 48 mA
IOL = 64 mA
–1.2
–1.2
–1.2
V
VOH
2.5
2.5
2.5
V
3
3
3
2
2
2*
2
VOL
0.55
0.55
V
0.55*
0.55
II
D, LE, OE,
TCK
±
1
±
1
±
1
μ
A
IIH
IIL
IOZH
IOZL
Ioff
ICEX
IO
VI = VCC
VI = GND
VO = 2.7 V
VO = 0.5 V
VI or VO
≤
5.5 V
VO = 5.5 V
VO = 2.5 V
TDI, TMS
10
10
10
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
mA
TDI, TMS
–160
–160
–160
50
50
50
–50
±
100
50
–50
–50
±
100
50
Outputs high
50
–50
–100
–180
–50
–180
–50
–180
ICC
VCC = 5.5 V,
VI = VCC or GND
5 5 V
IO = 0,
Outputs high
2
2
2
Outputs low
30
30
30
mA
Outputs
disabled
2
2
2
VCC = 5.5 V,
VCC 5.5 V,
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
One input at 3.4 V,
1 5
1.5
1 5
1.5
1 5
1.5
mA
ICC§
Ci
Co
3
pF
8
pF
* On products compliant to MIL-STD-883, Class B, this parameter does not apply.
All typical values are at VCC = 5 V.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
§This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (test mode) (see Note 3 and Figure 9)
SN54ABT8373
MIN
0
SN74ABT8373
MIN
0
UNIT
MAX
MAX
fclock
tw
Clock frequency
TCK
50
50
MHz
Pulse duration
TCK high or low
D or LE or OE before TCK
↑
TDI before TCK
↑
TMS before TCK
↑
D or LE or OE after TCK
↑
TDI after TCK
↑
TMS after TCK
↑
Power up to TCK
↑
VCC power up
5
5
ns
S
p
i
tsu
6
ns
6
H ld i
Hold time
0
th
0
ns
0
td
tr
Delay time
50
ns
μ
s
Rise time
1
NOTE 3: Product preview specifications are design goals only and are subject to change without notice.
P
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