參數(shù)資料
型號(hào): SPEAR-07-NC03
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PBGA180
封裝: LEAD FREE, 12 X 12 MM, 1.70 MM HEIGHT, LFBGA-180
文件頁(yè)數(shù): 8/194頁(yè)
文件大?。?/td> 1987K
代理商: SPEAR-07-NC03
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
SPEAR-07-NC03
6 Blocks description
Client interrupt status register reports the interrupt status of interrupts from the following
sources:
DMA_RX, DMA_TX and IO_IP.
All the significant register bits are read/Clear (RC): they can be read, a write with '0' has no
effect while writing '1' reset the bit value to '0'.
Each bit can bi cleared writing '1' (writing '0' will have no effect)
TX_IO_INT
: Set when the external IO device (IEEE1284 block), connected to the TX DMA port,
sets an interrupt request.
TX_MERR_INT
: Set when AHB master receives an error response from the selected slave and
the internal arbiter is granting the TX FIFO.
TX_SERR_INT
: Set when the AHB slave drives an error on the AHB BUS as response to an
TX_FIOFO_PUSH request. This condition is achieved when on of the following conditions is
true:
i.
TX_DMA.START_SERR_EN is true and retry counter expires.
ii.
Slave access with size > 32 bit.
iii.
Slave access with a read request.
iv.
Slave access when the TX_DMA_START.DMA_EN is true (DMA Master Mode)
TX_DONE
: Set when the TX master DMA completes.
TX_IOREQ
: Set when the DMA TX is active (master or slave mode) and the IO interface
request cannot be served because:
i.
FIFO is empty
ii.
Current DMA cycle is finished and the next one is not yet started.
TX_RTY
: Set when the AHB slave retry counter expires (even if the
TX_DMA_START.SERR_EN is false), that means that an AHB TX FIFO write has been
attempt, with a wrong byte size attributes, more than allowed by the retry counter.
TX_TO
: Set when some data are stalled inside the TX FIFO for too long time.
TX_ENTRY
: Set when the TX DMA is triggered by a number of empty TX FIFO entries bigger
than the value set in the DMA_CNTL register.
TX_FULL
: Set when the TX FIFO becomes full (< 4 byte entries available).
TX_EMPTY
: Set when the TX FIFO becomes empty.
RX_IO_INT
: Set when the external IO device (IEEE1284 block), connected to the RX DMA
port, sets an interrupt request.
RX_MERR_INT
: Set when AHB master receives an error response from the selected slave and
the internal arbiter is granting the RX FIFO.
RX_SERR_INT
: Set when the AHB slave drives an error on the AHB BUS as response to a
RX_FIFO_POP
request. This condition is achieved when on of the following conditions is true:
v.
RX_DMA.START_SERR_EN is true and retry counter expires.
vi.
Slave access with size > 32 bit.
相關(guān)PDF資料
PDF描述
SPG-8650A60KHZ CRYSTAL OSCILLATOR, CLOCK, 0.06 MHz, CMOS OUTPUT
SPL-45-GB-EBZ-CDA FIBER OPTIC TRANSCEIVER, 1480-1500nm, 1250Mbps(Tx), 1250Mbps(Rx), SURFACE MOUNT, LC CONNECTOR
SPL2F85 FIBER OPTIC LASER DIODE EMITTER, 840-860nm, PANEL MOUNT, TO-220, FC CONNECTOR
SPL2Y81-2S 808 nm, LASER DIODE
SPLC-35-FE-BX-CDFA FIBER OPTIC TRANSCEIVER, 1260-1360nm, 125Mbps(Tx), 125Mbps(Rx), SURFACE MOUNT, LC CONNECTOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SPEAR-09-B042 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr㈢ BASIC ARM 926EJ-S core, customizable logic, large IP portfolio SoC
SPEAR-09-H022 制造商:STMicroelectronics 功能描述:
SPEAR-09-H022_06 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
SPEAR-09-H042 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head200, ARM 926, 200 K customizable eASIC⑩ gates, large IP portfolio SoC
SPEAR-09-H122 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600