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| 型號： | T48C893-TKQ |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | The multiple times programmable (MTP) version for the MARC4 ROM types |
| 中文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | SSO-20 |
| 文件頁數(shù)： | 6/82頁 |
| 文件大?。?/td> | 638K |
| 代理商： | T48C893-TKQ |
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T48C893
Rev. A4, 22-Jan-02
6 (82)
Ordering Information
Extended Type Number
T48C893
–
TK
Package
Remarks
SSO20
Tube
T48C893
–
TKQ
SSO20
Taped and reeled
1
Introduction
The T48C893 is a member of Atmels family of 4-bit
single-chip microcontrollers. Instead of ROM it contains
EEPROM, RAM, parallel I/O ports, two 8-bit program-
mable multifunction timer/counters, voltage supervisor,
interval timer with watchdog function and a sophisticated
on-chip clock generation with integrated RC-, 32-kHz
crystal- and 4-MHz crystal-oscillators.
2
Differences between
T48C893 and M44Cx90/x92
Program Memory
2.1
The program memory of the MTP devices is realized as
an EEPROM. The memory size for user programs is
4096 Bytes. It is programmed as 258
data. The implemented LOCK-bit function is user select-
able and protects the device from unauthorized read-out
of the program memory.
2.2
Configuration Memory
16 Byte blocks of
An additional area of 32 Bytes of the EEPROM is used to
store information about the hardware configuration. All
the options that are selectable for the ROM versions are
available to the user. This includes not only the different
port options but also the possibilities to select different ca-
pacitors for OSC1 and OSC2, the option to enable or
disable the hardlock for the watchdog, the option to select
OSC2 instead of OSC1 as external clock input and the op-
tion to enable the external clock monitor as a reset source.
2.3
Data Memory
The T48C893 contains an internal data EEPROM that is
organized as two pages of 32
with the ROM parts, the page used has to be defined
within the application software by writing the I
2
C-com-
mand
“
09h
”
to the EEPROM. This command has no
effect for the M44Cx90/x92 if it is left inside the HEX-file
for the ROM version. Also for compatibility reasons the
access to the EEPROM is handled via the MCL (serial in-
terface) as in the corresponding ROM parts.
2.4
Reset Function
16 bit. To be compatible
During each reset (power-on or brown-out) the I/O-con-
figuration is deleted and reloaded with the data from the
configuration memory. This leads to a slightly different
behavior compared to the ROM versions. Both devices
switch their I/Os to input during reset but the ROM part
has the mask selected pull-up or pull-down resistors ac-
tive while the MTP has them removed until the download
is finished.
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