參數(shù)資料
型號: T48C893-TKQ
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: The multiple times programmable (MTP) version for the MARC4 ROM types
中文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20
封裝: SSO-20
文件頁數(shù): 65/82頁
文件大?。?/td> 638K
代理商: T48C893-TKQ
T48C893
Rev. A4, 22-Jan-02
65 (82)
Combination Mode Timer 3 and SSI
8
bit Counter 3
RES
Compare 3/1
T3CO1
T3CP
T3CO2
Timer 3
control
T3O
CL3
T3I
T3EX
SYSCL
T1OUT
POUT
I/O
bus
Compare 3/2
T3CM1
T3CM2
T3C
T3ST
Modulator 3
Demodu
lator 3
M2
Control
SO
TOG3
INT5
RES
CM31
T3I
T3EX
SI
SC
T3M
T3CS
CP3
13877
8
bit shift register
MSB
LSB
Shift_CL
SO
SIC1
SIC2
SISC
SCLI
Control
STB
SRB
SI
Output
INT3
I/O
bus
SSI
control
TOG2
POUT
T1OUT
SYSCL
SI
MCL_SC
MCL_SD
Transmit buffer
Receive buffer
SC
SC
SI
Figure 74. Combination Timer 3 and SSI
Combination mode 6: FSK modulation
SSI mode 1:
8-bit shift register internal data output (SO) to the Timer 3
Timer 3 mode 8:
FSK modulation with shift register data (SO)
The two compare registers are used to generarte two varied time intervals. The SSI data output selects which compare
register is used for the output frequency generation. A
0
-level at the SSI data output enables the compare register 1
and a
1
-level enables the compare register 2. The both compare and compare mode registers must be programmed
to generate the two frequencies via the output toggle flip-flop. The SSI can be supplied with the toggle signal of Timer 2
or any other clock source. The Timer 3 counter is driven by an internal or external clock source.
0 1 2 3 4 0 1 2 3 4 0 1 2 0
Counter 3
CM31
CM32
SO
13893
1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 0 1 2 3 4 0
T3R
1 2
T3O
3
0
1
0
4 0
Figure 75. FSK modulation
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