參數(shù)資料
型號: T9000
英文描述: ISDN Network Termination Node (NTN) Device
中文描述: ISDN網(wǎng)絡(luò)終端節(jié)點(新界北)設(shè)備
文件頁數(shù): 105/126頁
文件大?。?/td> 2127K
代理商: T9000
Lucent Technologies Inc.
105
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
T9000
14 Comparators
The comparator module consists of three low-power, general-purpose comparators. Each comparator has an inde-
pendent powerdown mode (CME register). Each comparator can generate a separate interrupt (CMIR[CMI(2:0)]),
when a transition occurs on its output. Each interrupt can be programmed to trigger on a 0 to 1 or 1 to 0 output
change (CMT register) and may be individually enabled via register CMIE. All interrupts are cleared when the
CMIR register is read.
The current output of each comparator (CMV) is available by reading any of the comparator register. When a com-
parator is powered down, it retains its current output CMV(i) as illustrated in Figure 24, where it is assumed that
INN(i) input has a fixed reference voltage. The CMV bits are useful for situations in which it is desirable to poll the
state of a comparator; for example, in verifying that a comparator that triggered an interrupt by transitioning
through a threshold in a particular direction has not returned to its preceding state. The ability to poll the state of
the comparators also allows the use of the comparators without having to enable any of the corresponding inter-
rupts. In many applications, analog input signals change at a very low rate. Users may implement interrupt-based
or polling-based algorithms where the comparator is powered up for a very small fraction of time. In this case, the
power consumption is minimized.
5-6726 (F)
Key:
A: Interrupt generated (CMI[i] = 1), if enabled (CMIE[i] = 1) and falling transition (CMT[i] = 0).
B: Interrupt generated (CMI[i] = 1), if enabled (CMIE[i] = 1) and falling transition (CMT[i] = 1).
Figure 24. (A) CMV When CME Is a Periodic Pulse and (B) CMV When CME Is Static
INP(i)
INN(i)
CME(i)
CMV(i)
CME(i)
CMV(i)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
A
B
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