參數(shù)資料
型號(hào): TMPR4955
廠商: Toshiba Corporation
英文描述: 64-bit RISC (Reduced Instruction Set Computer) microprocessor(64位精簡指令集系統(tǒng)計(jì)算機(jī)微處理器)
中文描述: 64位RISC(精簡指令集計(jì)算機(jī))微處理器(64位精簡指令集系統(tǒng)計(jì)算機(jī)微處理器)
文件頁數(shù): 12/60頁
文件大?。?/td> 244K
代理商: TMPR4955
TOSHIBA
TENTATIVE
TMPR4955/56
20-Oct.-1999
12
5.3.1 Interface bus
Figure 5.3-1 illustrates the 64-bit address/data bus SysAD (63:0), which is the main communication bus of
the system interface, and the 9-bit command bus SysCmd (8:0). SysAD and SysCmd are bi-directional
busses. In other words, these two busses are used for the processor to issue processor requests and for the
external agent to issue external requests.
TX4956
External agent
SysAD(63:0)
SysCmd(8:0)
Figure 5.3-1 System Interface Bus
Requests sent via the system interface consist of the following:
Address
System interface command that strictly specifies the type of request
Series of data elements for when the request is a particular write or read process.
5.3.2 Address cycle and data cycle
Cycles during which valid addresses exist on the SysAD bus are referred to as address cycles. Also,
cycles during which valid data exist on the SysAD bus are referred to as data cycles. Validity is
determined depending on the ValidIn* signals and ValidOut* signals.
The SysCmd bus is used to identify the contents of the SysAD bus for all cycles at which it is to be valid.
The most significant bit of the SysCmd bus is used to indicate whether the current cycle is an address
cycle or a data cycle.
In the case of an address cycle [SysCmd(8) = 0], the remaining bits SysAD(7:0) of the SysCmd
bus contain the system interface commands.
In the case of a data cycle [SysCmd(8) = 1], the remaining bits SysAD(7:0) of the SysCmd bus
contain the data identifier.
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