參數(shù)資料
型號(hào)： TMS570LS10216ASZWTQR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 160 MHz, RISC MICROCONTROLLER, PBGA337
封裝： GERRN, PLASTIC, NFBGA-337
文件頁(yè)數(shù)： 26/102頁(yè)
文件大小： 1146K
代理商： TMS570LS10216ASZWTQR
PRODUCTPREVIEW
www.ti.com
SPNS141D – AUGUST 2010 – REVISED JANUARY 2011
16 Dedicated General-Purpose I/O (GIO) Pins for ZWT; 8 Dedicated GIO Pins for PGE
115 Total Peripheral I/Os for ZWT; 68 Total Peripheral I/Os for PGE
16-Bit External Memory Interface (EMIF)
The devices utilize the big-endian format where the most significant byte of a word is stored at the lowest
numbered byte and the least significant byte at the highest numbered byte.
The device memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte,
halfword, and word modes. The flash memory on this device is a nonvolatile, electrically erasable and
programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3V
supply input (same level as I/O supply) for all read, program and erase operations. When in pipeline
mode, the flash operates with a system clock frequency of up to 160 MHz.
The device has nine communication interfaces: three MibSPIs, two LIN/SCIs, three DCANs and one
FlexRay controller (optional). The SPI provides a convenient method of serial interaction for high-speed
communications between similar shift-register type devices. The LIN supports the Local Interconnect
standard 2.0 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero
(NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster
communication protocol that efficiently supports distributed real-time control with robust communication
rates of up to 1 megabit per second (Mbps). The DCAN is ideal for applications operating in noisy and
harsh environments (e.g., automotive and industrial fields) that require reliable serial communication or
multiplexed wiring. The FlexRay uses a dual channel serial, fixed time base multimaster communication
protocol with communication rates of 10 megabits per second (Mbps) per channel. A FlexRay Transfer
Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. Transfers are
protected by a dedicated, built-in Memory Protection Unit (MPU).
The NHET is an advanced intelligent timer that provides sophisticated timing functions for real-time
applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer
micromachine and an attached I/O port. The NHET can be used for pulse width modulated outputs,
capture or compare inputs, or general-purpose I/O.. It is especially well suited for applications requiring
multiple sensor information and drive actuators with complex and accurate time pulses. A High End Timer
Transfer Unit (HET-TU) provides features to transfer NHET data to or from main memory. A Memory
Protection Unit (MPU) is built into the HET-TU to protect against erroneous transfers.
The device has two 12-bit-resolution MibADCs with 24 total channels and 64 words of parity protected
buffer RAM each. The MibADC channels can be converted individually or can be grouped by software for
sequential conversion sequences. Eight channels are shared between the two ADCs. There are three
separate groupings, two of which are triggerable by an external event. Each sequence can be converted
once when triggered or configured for continuous conversion mode.
The frequency-modulated phase-locked loop (FMzPLL) clock module contains a phase-locked loop, a
clock-monitor circuit, a clock-enable circuit, and a prescaler. The function of the FMzPLL is to multiply the
external frequency reference to a higher frequency for internal use. The FMzPLL provides one of the six
possible clock source inputs to the global clock module (GCM). The GCM module provides system clock
(HCLK), real-time interrupt clock (RTICLK1), CPU clock (GCLK), NHET clock (VCLK2), DCAN clock
(AVCLK1), and peripheral interface clock (VCLK) to all other peripheral modules.
The device also has an external clock prescaler (ECP) module that when enabled, outputs a continuous
external clock on the ECLK pin. The ECLK frequency is a user-programmable ratio of the peripheral
interface clock (VCLK) frequency.
The Direct Memory Access Controller (DMA) has 16 channels, 32 control packets and parity protection on
its memory. The DMA provides memory to memory transfer capabilities without CPU interaction. A
Memory Protection Unit (MPU) is built into the DMA to protect memory against erroneous transfers.
The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt or
external Error pin is triggered when a fault is detected.
Copyright 2010–2011, Texas Instruments Incorporated
TMS570LS Series 16/32-BIT RISC Flash Microcontroller
3
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