參數(shù)資料
型號(hào)： TMS570LS10216ASZWTQR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 160 MHz, RISC MICROCONTROLLER, PBGA337
封裝： GERRN, PLASTIC, NFBGA-337
文件頁數(shù)： 89/102頁
文件大?。?/td> 1146K
代理商： TMS570LS10216ASZWTQR
PRODUCTPREVIEW
www.ti.com
SPNS141D – AUGUST 2010 – REVISED JANUARY 2011
7.14 EMIF Timings
Table 7-19. EMIF Read/Write Mode Switching Characteristics(1)(2)
NO
Parameter
Description
MIN
MAX
Unit
Reads and Writes
1
td(TURNAROUND)
Turn around time
(TA + 1) * E -
ns
tr(CS) - 2
tr(CS) + 3
Reads
2
tc(EMRCYCLE)
EMIF read cycle time
(RS + RST +
ns
RH + TA +4) *
E - tf(CS) - 3
E - tf(CS) + 3
3
tsu(EMCSL-EMOEL) Output setup time, EMIFCS[3:0] low to EMIFOE
(RS +1) * E -
ns
low (SS=0)
tf(CS) + tf(OE) - 5
tf(CS) + tf(OE) + 5
Output setup time, EMIFCS[3:0] low to EMIFOE
- tf(CS) + tf(OE) -
- tf(CS) + tf(OE) +
ns
low (SS=1)
5
4
th(EMOEH-EMCSH) Output hold time, EMIFOE high to EMIFCS[3:0]
(RH +1) * E -
ns
high (SS=0)
tr(OE) + tr(CS) - 4 tr(OE) + tr(CS) + 6
Output hold time, EMIFOE high to EMIFCS[3:0]
- tr(OE) + tr(CS) -
- tr(OE) + tr(CS) +
ns
high (SS=1)
4
6
5
tsu(EMBAV-EMOEL) Output setup time, EMIFBADD[1:0] valid to
(RS +1) * E -
ns
EMIFOE low
trf(AD) + tf(OE) - 5
trf(AD) + tf(OE) +
5
6
th(EMOEH-EMBAIV) Output hold time, EMIFOE high to
(RH +1) * E -
ns
EMIFBADD[1:0] invalid
tr(OE) - 5
tr(OE) + 5
7
tsu(EMAV-EMOEL)
Output setup time, EMIFADD[21:0] valid to
(RS +1) * E -
ns
EMIFOE low
trf(AD) + tf(OE) - 6
trf(AD) + tf(OE) +
6
8
th(EMOEH-EMAIV)
Output hold time, EMIFOE high to EMIFADD[21:0]
(RH +1) * E -
ns
invalid
tr(OE) - 5
tr(OE) + 6
9
tw(EMOEL)
EMIFOE active low width
(RST +1) * E -
ns
tf(OE) - 1
tf(OE) + 0
10
tsu(EMDV-EMOEH)
Setup time, EMIFD[15:0] valid before EMIFOE
tr(OE) + 9
ns
high
11
th(EMOEH-EMDV)
Hold time, EMIFD[15:0] valid after EMIFOE high
- tr(OE) - 3
Writes
12
tc(EMWCYCLE)
EMIF write cycle time
(WS + WST +
ns
WH + TA +4) *
E - tf(CS) - 3
E - tf(CS) + 2
13
tsu(EMCSL-EMWEL) Output setup time, EMIFCS[3:0] low to EMIFWE
(WS +1) * E -
ns
low (SS=0)
tf(CS) + tf(WE) - 5 tf(CS) + tf(WE) + 5
Output setup time, EMIFCS[3:0] low to EMIFWE
- tf(CS) + tf(WE) -
- tf(CS) + tf(WE) +
ns
low (SS=1)
5
14
th(EMWEH-EMCSH) Output hold time, EMIFWE high to EMIFCS[3:0]
(WH +1) * E -
ns
high (SS=0)
tr(WE) + tr(CS) - 4
tr(WE) + tr(CS) +
5
Output hold time, EMIFWE high to EMIFCS[3:0]
- tr(WE) + tr(CS) -
- tr(WE) + tr(CS) +
ns
high (SS=1
4
5
15
tsu(EMBAV-EMWEL) Output setup time, EMIFBADD[1:0] valid to
(WS +1) * E -
ns
EMIFWE low
trf(AD) + tf(WE) - 5
trf(AD) + tf(WE) +
5
16
th(EMWEH-EMBAIV) Output hold time, EMIFWE high to EMBADD[1:0]
(WH +1) * E -
ns
invalid
tr(WE) - 5
tr(WE) + 5
17
tsu(EMAV-EMWEL)
Output setup time, EMIFADD[21:0] valid to
(WS +1) * E -
ns
EMIFWE low
trf(AD) + tf(WE) - 6
trf(AD) + tf(WE) +
6
(1)
RS = Read setup, RST = Read Strobe, RH = Read Hold, WS = Write Setup, WST = Write Strobe, WH = Write Hold, TA = Turn Around,
SS= Strobe Select Mode
(2)
E = VCLK period in ns.
Copyright 2010–2011, Texas Instruments Incorporated
Peripheral and Electrical Specifications
87
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