參數(shù)資料
型號(hào): TMS570LS10216ASZWTQR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 160 MHz, RISC MICROCONTROLLER, PBGA337
封裝: GERRN, PLASTIC, NFBGA-337
文件頁數(shù): 56/102頁
文件大?。?/td> 1146K
代理商: TMS570LS10216ASZWTQR
PRODUCTPREVIEW
www.ti.com
SPNS141D – AUGUST 2010 – REVISED JANUARY 2011
5
Device Registers
5.1
Device Identification Code Register
The device identification code register identifies several aspects of the device including the silicon version.
The details of the device identification code register are shown in Figure 5-1. The device identification
code register value for this device is:
Rev 0 = 0x80206D05
Rev A = 0x80206D0D
Figure 5-1. Device ID Bit Allocation Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CP-15
UNIQUE ID
16
R-1
R-00000 0000 10000
R-0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TECH
I/O
PERIP
FLASH ECC
RAM
VERSION
1
0
1
VOLT
HERA
ECC
AGE
L
PARIT
Y
R-011
R-0
R-1
R-10
R-1
R-0
R-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset; D= device dependent
Table 5-1. Device ID Bit Allocation Register Field Descriptions
Bit
Field
Value
Description
31
CP15
Indicates the presence of coprocessor 15
0
CP15 not present
1
CP15 present
30-17
UNIQUE ID
1
Silicon version (revision) bits This bitfield holds a unique number for a dedicated device configuration
(die).
16-13
TECH
Process technology on which the device is manufactured.
0000
C05
0001
F05
0010
C035
0011
F035
Others
Reserved
12
I/O
I/O voltage of the device.
VOLTAGE
0
I/O are 3.3v
1
I/O are 5v
11
PERIPHERA
Peripheral Parity
L PARITY
0
No parity on peripherals
1
Parity on peripherals
10-9
FLASH ECC
Flash ECC
00
No error detection/correction
01
Program memory with parity
10
Program memory with ECC
11
Reserved
8
RAM ECC
Indicates if RAM memory ECC is present.
0
No ECC implemented
1
ECC implemented
7-3
REVISION
Revision of the Device.
Copyright 2010–2011, Texas Instruments Incorporated
Device Registers
57
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