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Device Configurations
3.1 System Module Registers
TMS320DM6437
Digital Media Processor
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
The system module includes status and control registers required for configuration of the device. Brief
descriptions of the various registers are shown in
Table 3-1
. System Module registers required for device
configurations are discussed in the following sections.
Table 3-1. System Module Register Memory Map
HEX ADDRESS RANGE
0x01C4 0000
REGISTER ACRONYM
PINMUX0
DESCRIPTION
Pin Multiplexing Control 0 (see
Section 3.7.2.1
,
PINMUX0 Register
Description
).
Pin Multiplexing Control 1 (see
Section 3.7.2.2
,
PINMUX1 Register
Description
).
DSP Boot Address (see
Section 3.4.2.3
,
DSPBOOTADDR Register
).
Boot Complete (see
Section 3.4.2.2
,
BOOTCMPLT Register
).
Reserved
Device Boot Configuration (see
Section 3.4.2.1
,
BOOTCFG Register
).
Reserved
JTAG ID (see
Section 6.24.1
,
JTAG ID (JTAGID) Register
Description(s)
).
Reserved
HPI Control (see
Section 3.6.2.1
,
HPI Control Register
).
Reserved
Reserved
Bus Master Priority Control 0 (see
Section 3.6.1
,
Switch Central
Resource (SCR) Bus Priorities
).
Bus Master Priority Control 1 (see
Section 3.6.1
,
Switch Central
Resource (SCR) Bus Priorities
).
VPSS Clock Control (see
Section 3.3.2
,
VPSS Clocks
).
V
3.3-V I/O Powerdown Control (see
Section 3.2
,
Power
Considerations
).
DDR2 VTP Enable Register (see
Section 6.9.4
,
DDR2 Memory
Controller
).
Reserved
Timer Control (see
Section 3.6.2.2
,
Timer Control Register
).
EDMA TC Configuration (see
Section 3.6.2.3
,
EDMA TC Configuration
Register
).
Reserved
0x01C4 0004
PINMUX1
0x01C4 0008
0x01C4 000C
0x01C4 0010
0x01C4 0014
0x01C4 0018 - 0x01C4 0027
0x01C4 0028
DSPBOOTADDR
BOOTCOMPLT
–
BOOTCFG
–
JTAGID
0x01C4 002C
0x01C4 0030
0x01C4 0034
0x01C4 0038
0x01C4 003C
–
HPICTL
–
–
MSTPRI0
0x01C4 0040
MSTPRI1
0x01C4 0044
0x01C4 0048
VPSS_CLKCTL
VDD3P3V_PWDN
0x01C4 004C
DDRVTPER
0x01C4 0050 - 0x01C4 0080
0x01C4 0084
0x01C4 0088
–
TIMERCTL
EDMATCCFG
0x01C4 008C
–
Device Configurations
76
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