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TMS320DM6443
Digital Media System-on-Chip
SPRS282E–DECEMBER 2005–REVISED MARCH 2007
Table 6-64. USB 2.0 Register Descriptions (continued)
Address
0x01C6 450A
0x01C6 450A
Acronym
HOST_TYPE0
HOST_TXTYPE
Register Description
Defines the Speed of Endpoint 0
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host TX endpoint.
Sets the NAK response timeout on Endpoint 0.
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host TX endpoint.
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host RX endpoint.
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host RX endpoint.
Returns details of core configuration
Returns the configured size of the selected RX FIFO and TX FIFOs
Control and Status Register for Endpoints- EOCSR1
Maximum Packet size for Peripheral/Host TX Endpoint
Control Status Register for Endpoint 0 in Peripheral Mode
Control Status Register for Endpoint 0 in Host Mode
Control Status Register for Peripheral TX Endpoint
Control Status Register for Host TX Endpoint
Maximum Packet Size for Peripheral/Host RX Endpoint
Control Status Register for Peripheral RX Endpoint
Control Status Register for Host RX Endpoint
Number of Received Bytes in Endpoint 0 FIFO
Number of Bytes in Host RX Endpoint FIFO
Defines the Speed of Endpoint 0
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host TX endpoint.
HOST_NAKLIMIT0
Sets the NAK response timeout on Endpoint 0
HOST_TXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host TX endpoint.
HOST_RXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host RX endpoint.
HOST_RXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host RX endpoint.
CONFIGDATA
Returns details of core configuration
FIFOSIZE
Returns the configured size of the selected RX FIFO and TX FIFOs
Control and Status Register for Endpoints- EOCSR2
TXMAXP
Maximum Packet Size for Peripheral/Host TX Endpoint
PERI_CSR0
Control Status Register for Endpoint 0 in Peripheral Mode
HOST_CSR0
Control Status Register for Endpoint 0 in Host Mode
PERI_TXCSR
Control Status Register for Peripheral TX Endpoint
HOST_TXCSR
Control Status Register for Host TX Endpoint
RXMAXP
Maximum Packet Size for Peripheral/Host RX Endpoint
PERI_RXCSR
Control Status Register for Peripheral RX Endpoint
HOST_RXCSR
Control Status Register for Host RX Endpoint
COUNT0
Number of Received Bytes in Endpoint 0 FIFO
RXCOUNT
Number of Bytes in Host RX Endpoint FIFO
HOST_TYPE0
Defines the Speed of Endpoint 0
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host TX endpoint.
HOST_NAKLIMIT0
Sets the NAK response timeout on Endpoint 0.
0x01C6 450B
0x01C6 450B
HOST_NAKLIMIT0
HOST_TXINTERVAL
0x01C6 450C
HOST_RXTYPE
0x01C6 450D
HOST_RXINTERVAL
0x01C6 450F
0x01C6 450F
CONFIGDATA
FIFOSIZE
0x01C6 4510
0x01C6 4512
0x01C6 4512
0x01C6 4512
0x01C6 4512
0x01C6 4514
0x01C6 4516
0x01C6 4516
0x01C6 4518
0x01C6 4518
0x01C6 451A
0x01C6 451A
TXMAXP
PERI_CSR0
HOST_CSR0
PERI_TXCSR
HOST_TXCSR
RXMAXP
PERI_RXCSR
HOST_RXCSR
COUNT0
RXCOUNT
HOST_TYPE0
HOST_TXTYPE
0x01C6 451B
0x01C6 451B
0x01C6 451C
0x01C6 451D
0x01C6 451F
0x01C6 451F
0x01C6 4520
0x01C6 4522
0x01C6 4522
0x01C6 4522
0x01C6 4522
0x01C6 4524
0x01C6 4526
0x01C6 4526
0x01C6 4528
0x01C6 4528
0x01C6 452A
0x01C6 452A
0x01C6 452B
Peripheral and Electrical Specifications
182
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