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參數(shù)資料
| 型號： | TNET3001 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SONET STS-1 Overhead Terminator(SONET STS-1附加終端) |
| 中文描述： | SONET的STS - 1的開銷終結(jié)者（SONET的STS - 1的附加終端） |
| 文件頁數(shù)： | 4/49頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | TNET3001 |
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TNETS3001
SONET STS-1 OVERHEAD TERMINATOR
SDNS007B – OCTOBER 1993 – REVISED JUNE 1995
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
The receive-retiming function retimes the line input to the reference frequency, performs pointer recalculation,
and SPE-only extraction. All transport-overhead bytes are demultiplexed and the payload is retimed. The
reference clock used for retiming is selected by MUX 2 as either the line clock (RLCI) or the reference clock TLCI.
The terminal-side output multiplexer MUX 3 allows selection of either the output of the overhead-processing
function or the output of the receive-retiming function.
In the transmit direction, the SPE-only signal to STS-1 function receives serial SPE-only signals from the
terminal and introduces framing and pointer bytes to produce a parallel STS-1 signal. The parallel-to-serial
function uses the phase-lock loop (PLL) to serialize either the data from the SPE-only function or parallel input
from the terminal. The MUX 5 multiplexer selects the input to the transmit-framing and the pointer-tracking
function from either loopback data from the output of the receive-side overhead-processing function or the
output of the parallel-to-serial converter or serial STS-1 input from the terminal.
The framing and pointer-tracking function performs frame synchronization to the serial STS-1 signal,
serial-to-parallel conversion, and pointer tracking. Incoming STS-1 alarms are also detected. The section, line,
and path-overhead bytes are stored into RAM locations for access by the microprocessor. The path-overhead
bytes are then optionally multiplexed from the RAM locations written by the microprocessor.
The transmit-retiming function performs retiming to the reference frequency and pointer recalculation. The
transport-overhead multiplexer optionally multiplexes the section and line overhead bytes from the RAM written
by the microprocessor. The orderwire/datacom insert optionally multiplexes the orderwire, datacom and APS
bytes from the two datacom interfaces and the orderwire interface into the transmit outgoing transport-overhead
RAM locations.
The transport-overhead RAMs consist of locations for storing received incoming transport-overhead bytes,
received outgoing transport-overhead bytes (written by the microprocessor), transmitted incoming transport-
overhead bytes, and transmitted outgoing transport-overhead bytes. It also stores B1 and B2 performance
monitors and pointer-justification counters. The RAM also acts as a temporary storage for datacom and
orderwire bytes received from the respective interfaces.
The path-overhead RAMs consist of locations for storing received incoming path-overhead bytes, received
outgoing path-overhead bytes (written by the microprocessor), transmitted incoming path-overhead bytes, and
transmitted outgoing path-overhead bytes. It also stores B3 and FEBE performance monitors.
The microprocessor interface provides access to the control registers that select various modes of operation
and status registers that report various alarm conditions. It also provides access to the transport- and path-
overhead RAMs and provides both software and hardware interrupt capability based on the status of the device.
When in the serial mode (PABA =0) with SPE = 1, the terminal output of the TNETS3001 contains payload bits
but no transport-overhead (TOH) bits (see the TNETS3001 memory map section of this data sheet). The RSPE
output provides a gapping signal for the SPE-only mode of operation. Nominally, there are 24 bits (8
×
3) of TOH
and 696 bits (8
×
87) of payload. For this circumstance, the RSPE provides 24 equally spaced gaps in the output
data (720/24 = 30, every 30th bit is gapped). When there is an increment in the pointer, there must be
32 equally spaced gaps and when there is a decrement, there are 16 equally spaced gaps for the row containing
the pointer bytes.
P
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