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參數(shù)資料
| 型號： | TNET3001 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SONET STS-1 Overhead Terminator(SONET STS-1附加終端) |
| 中文描述： | SONET的STS - 1的開銷終結(jié)者（SONET的STS - 1的附加終端） |
| 文件頁數(shù)： | 7/49頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | TNET3001 |
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TNETS3001
SONET STS-1 OVERHEAD TERMINATOR
SDNS007B – OCTOBER 1993 – REVISED JUNE 1995
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
section and line data-communication interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
STDI
43
I
TTL
Transmit section data-communication data input. STDI is serial 192-kbit/s data (D1 – D3 bytes) clocked into
the TNETS3001 on positive transitions of STCO.
STCO
44
O
TTL
Transmit section data-communication clock output. STCO is a 192-kHz clock, derived from TLCO, used for
sourcing the section data-communication data into the TNETS3001.
LTDI
45
I
TTL
Transmit line data-communication data input. LTDI is serial 576-kbit/s data (D4 – D12 bytes) clocked into the
TNETS3001 on positive transitions of LTCO.
LTCO
46
O
TTL
Transmit line data-communication clock output. LTTCO is a 576-kHz clock, derived from TLCO, used for
sourcing the line data-communication data into the TNETS3001.
SRDO
71
O
TTL
Receive section data-communication data output. SRDO is serial 192-kbit/s data (D1 – D3 bytes) clocked out
of the TNETS3001 on positive transitions of SRCO.
LRCO
72
O
TTL
Receive line data-communication clock output. LRCO is a 576-kHz clock, derived from RLCI, used for clocking
out the line data-communication serial data.
LRDO
73
O
TTL
Receive line data-communication data output. LRDO is serial 576-kbit/s data (D4 – D12 bytes) clocked out
of the TNETS3001 on negative transitions of LRCO.
SRCO
74
O
TTL
Receive section data-communication clock output. SRCO is a 192-kHz clock, derived from RLCI, used for
clocking out the section data-communication data.
terminal-side interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
RTCO
3
I/O
CMOS
Receive terminal-side clock output. RTCO is a 51.84-MHz terminal clock used for clocking out RTDO.
Depending on operating mode, RTCO is derived either from RLCI or TLCI.
RTDO
4
O
CMOS
Receive terminal-side data output. RTDO is serial 51.84-Mbit/s STS-1 receive data clocked out of the
TNETS3001 on negative transitions of RTCO.
RSPE
10
O
CMOS
Receive terminal-side SPE indication. RSPE is an active-high signal that indicates the synchronous
payload envelope in the terminal data output (RTDO or TPDO). For SPE-only mode, RSPE is a gapping
signal.
RSYN
75
O
CMOS
Receive terminal-side synchronization pulse. RSYN is high during the C1 byte and J1 byte of RTDO
or TPDO. In serial SPE-only mode, RSYN is high only during the J1 byte of RTDO.
TPCO
2
O
TTL
Terminal-side parallel-clock output. TPCO is a 6.48-MHz clock, derived from RTCO, that clocks out
received terminal byte data (TPDO).
TPDO7–TPDO2
TPDO1–TPDO0
84–79
77–76
O
TTL
Terminal-side parallel-data output. Byte-wide 6.48-Mbyte/s receive terminal data is clocked out of the
TNETS3001 on positive transitions of TPCO.
TTCI
60
I
CMOS
Transmit terminal-side serial-clock input. TTCI is a 51.84-MHz terminal clock used for clocking in TTDI.
TTDI
61
I
CMOS
Transmit terminal-side data input. TTDI is serial 51.84-Mbit/s transmit terminal data clocked into the
TNETS3001 on positive transitions of TTCI.
TSPE
36
I
CMOS
Transmit terminal-side SPE indication. TSPE is required input for the SPE-only mode. A high value
indicates the location of the SPE bits in TTDI. A low value identifies the location of a gap in the input
data.
TSYN
37
I
CMOS
Transmit terminal-side synchronization pulse. TSYN is required input for the SPE-only mode. TSYN
must be high during incoming J1 byte of TTDI or TPDI in the SPE-only mode. A high value during the
C1 byte of the data is optional.
TPCI
59
I
CMOS
Terminal-side parallel-clock input. TPCI is a 6.48-MHz clock used for clocking TPDI, TSPE, and TSYN.
TPDI7–TPDI0
48–55
I
TTL
Terminal-side parallel-data input. TPDI7–TPDI0 is byte-wide 6.48-Mbyte/s transmit terminal data
clocked into the TNETS3001 on positive transitions of TPCI.
P
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