參數(shù)資料
型號(hào)： TNET3001
廠商： Texas Instruments, Inc.
英文描述： SONET STS-1 Overhead Terminator(SONET STS-1附加終端)
中文描述： SONET的STS - 1的開銷終結(jié)者（SONET的STS - 1的附加終端）
文件頁數(shù)： 6/49頁
文件大?。?/td> 1090K
代理商： TNET3001
TNETS3001
SONET STS-1 OVERHEAD TERMINATOR
SDNS007B – OCTOBER 1993 – REVISED JUNE 1995
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
receive line-side interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
RFRI
6
I
CMOS
Receive-line frame in. RFRI is an optional active-low frame pulse that occurs during the C1 byte, bit 7 time.
When used, RFRI reduces the OOF exit time from two frames to one frame.
RLCI
8
I
CMOS
Receive-line clock in. RLCI is a 51.84-MHz clock that clocks in the serial data and the optional framing pulse.
RLCI is used as the time base for framing, pointer tracking, demultiplexing the transport-overhead bytes, and
for RAM access in the receive side.
RLDI
7
I
CMOS
Receive-line data in. RLDI is the incoming serial STS-1/STS-N data that is clocked into the TNETS3001 on the
rising edge of RLCI.
RXLOS
9
I
TTL
Receive loss of signal. RXLOS is an active-low external loss-of-signal indicator from a higher multiplexer such
as an SM3. TNETS3001 combines RXLOS with the internal loss of signal and reports the result to the
microprocessor as the RLOS status bit.
transmit line-side interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
TFRI
30
I
CMOS
Transmit-frame reference in. TFRI is an optional active-low frame pulse, synchronous with TLCI, that
determines outgoing A1A2 epoch. TFRI can be used only if TCLK = 1 (bit 6 address 1FA).
TLCI
29
I
CMOS
Transmit line-side clock in. TLCI is the 51.84-MHz reference-clock input.
TLCO
27
O
CMOS
Transmit line-side clock out. TLCO is an outgoing serial STS-1/STS-N clock. Depending on the operating
mode, TLCO is derived from TLCI, TTCI, or TPCI.
TLDO
26
O
CMOS
Transmit line-side data out. TLDO is outgoing serial STS-1/STS-N data that is clocked out of the TNETS3001
on the falling edge of TLCO.
orderwire/APS interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
LRFR
65
O
TTL
Receive-line orderwire-framing pulse. LRFR is an active-low signal that occurs one clock cycle after the LSB
of the K2 byte in the serial-bit stream (OTDO).
LTFR
39
O
TTL
Transmit-line orderwire-framing pulse. LTFR is the transmit-frame pulse for line-orderwire codec/filter.
ORCO
70
O
TTL
Receive orderwire and APS clock. ORCO is a 576-kHZ clock, derived from RLCI, used for clocking the
orderwire and APS bytes from the TNETS3001.
ORDO
67
O
TTL
Receive-orderwire byte and APS-byte output. The two orderwire bytes and APS bytes are clocked out of the
TNETS3001 on positive transitions of ORCO.
OTCO
42
O
TTL
Transmit orderwire and APS clock. OTCO is a 576-kHz clock, synchronous to TLCO, used for sourcing the
orderwire and APS bytes into the TNETS3001.
OTDI
41
I
TTL
Transmit-orderwire byte and APS-byte input. The two orderwire bytes and APS bytes are clocked into the
TNETS3001 on negative transitions of OTCO.
RAP
66
O
TTL
Receive APS framing pulse. RAP is an active-low signal that occurs one clock cycle after the LSB of the K2
byte in the serial-bit stream (OTDO).
SRFR
64
O
TTL
Receive-section orderwire-framing pulse. SRFR is the receive-frame pulse for section-orderwire codec/filter.
STFR
38
O
TTL
Transmit-section orderwire-framing pulse. STFR is the transmit-frame pulse for section-orderwire codec/filter.
TAP
40
O
TTL
Transmit APS-framing pulse. TAP is an active-low signal that occurs one clock cycle before the MSB of the
K1 byte is expected in the serial-bit stream (OTDI).
P
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