參數(shù)資料
型號(hào)： TTRN0110G
英文描述： ATM MULTIPLEXER|BGA|198PIN|CERAMIC
中文描述： ATM多路復(fù)用器|的BGA | 198PIN |陶瓷
文件頁數(shù)： 20/30頁
文件大?。?/td> 578K
代理商： TTRN0110G
20
Agere Systems Inc.
Data Sheet
March 29, 2002
10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer
TTRN0110G
Electrical Characteristics
LVDS, CMOS, CML Inputs and Outputs
Notes:
1. For Table 12 through Table 16, V
CC
= 3.3 V ± 5%, T
C
= 0 °C to 85 °C.
2. For more information on interpreting CML specifications, see the CML Output Structure (Used on Outputs
D10GP/N, CK10GP/N, LBDP/N) section on page 18.
Table 12. LVDS Input dc Characteristics
Table 13. LVDS Output dc Characteristics
Applicable
Pins
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
D[15:0]P/N,
REFCLKP/N
PICLKP/N
V
CM
Input Common-mode
Voltage Range
Input Peak Differential
Voltage
Differential Input
Impedance
*
Avg(V
IA
,V
IB
)
0
1200
2400
mV
V
DIFF
|V
IA
– V
IB
|
100
—
800
mV
R
IN
* Looser than ICORE/
IEEE
spec of ±10
.
V
IA
,V
IB
represent P and N differential pins.
f = 622.08 MHz
80
100
120
Applicable
Pins
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
CK622P/N,
CK155P/N
V
OH
Output Voltage High,
V
OA
or V
OB
Output Voltage Low,
V
OA
or V
OB
Output Differential Volt-
age
Output Offset Voltage
Differential Output
Impedance
R
O
Mismatch Between
A and B
Change in |V
OD
|
Between Logic 0 and
Logic 1
Change in |V
OS
|
Between Logic 0 and
Logic 1
Output Current
Output Current
R
LOAD
= 100
± 1%
—
—
1475
mV
V
OL
R
LOAD
= 100
± 1%
925
—
—
mV
|V
OD
|
R
LOAD
= 100
± 1%
250
—
400
mV
V
OS
R
O
R
LOAD
= 100
± 1%
1125
80
—
100
1275
280
mV
R
O
Vcm = 1.0 V and 1.4 V
—
—
20
%
|
V
OD
|
R
LOAD
= 100
± 1%
—
—
25
mV
|
V
OS
|
R
LOAD
= 100
± 1%
—
—
25
mV
I
SA
, I
SB
I
SAB
Driver shorted to GND
Drivers shorted
together
—
—
—
—
—
24
12
mA
mA
|I
XA
|,|I
XB
| Power-off Output
Leakage
—
—
—
*
* This leakage parameter is not specified due to EDS clamp diode conducting current during forward bias test.
This voltage is measured on each P/N output.
mA
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