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參數(shù)資料
| 型號： | TVP3010C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface Palette |
| 中文描述： | 視頻接口面板 |
| 文件頁數(shù)： | 33/90頁 |
| 文件大?。?/td> | 491K |
| 代理商： | TVP3010C |
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2–17
Table 2–6. Multiplex Mode and Bus-Width Selection (Continued)
MODE
SUB-
MODE
MULTIPLEX-
CONTROL
REGISTER 1
(HEX)
MULTIPLEX-
CONTROL
REGISTER 2
(HEX)
DATA
BITS
PER
PIXEL
(see
Note 9)
PIXEL-
BUS
WIDTH
MULTI-
PLEX
RATIO
(see
Note 10)
OVERLAY
BITS
PER
PIXEL
TABLE
REFERENCE
(see
Note 11)
1
46
03
24
32
1
NA
t1
24-bit
47
03
24
32
1
NA
t3
2
(5 6 5)
(5–6–5)
XGA
45
02
16
16
1
NA
t5
45
03
16
32
2
NA
t6
True
Color
3
(5 5 5)
(5–5–5)
TARGA
44
02
15
16
1
NA
t8
44
03
15
32
2
NA
t9
4
16 bit
16-bit
(6–6–4)
43
02
16
16
1
NA
t11
43
03
16
32
2
NA
t12
5
12 bit
12-bit
(4–4–4)
9. Data bits per pixel is the number of bits of pixel-port information used as color data for each displayed pixel,
often referred to as the number of bit-planes.
10. Multiplex ratio indicates the number of pixels per bus load or the number of pixels associated with each
LCLK (load clock) pulse. For example, with a 32-bit pixel-bus width and eight bit-planes, each bus load
consists of four pixels. In a typical implementation, the LCLK signal is either connected to or derived from
RCLK. Therefore, the RCLK divide ratio must be chosen as a function of the multiplex mode selected. The
RCLK divide ratio is not automatically set by mode selection but must be programmed in the output-clock
selection register by the user.
11. This column is a reference to Tables 2–8 through 2–11, where the actual manipulation of pixel information
and pixel latching sequences are illustrated for each of the multiplexing modes.
12. It is recommended that all unused input terminals be connected to ground to conserve power.
13. Multiplexer control register 2 bit 7 enables (1) and disables (0) the VGA port. When auxiliary-window or
port-select switching is to be done involving the VGA port, this bit needs to be set to 1 as well as
programming for the correct direct-color mode. For example, when auxiliary windowing is to be done with
direct-color submode 1 (32-bit pixel bus) and VGA, instead of programming 1B (hex), multiplexer control
register 2 should be programmed to 9B (hex). When only VGA pass-through is desired, the values should
be programmed for VGA mode as indicated in Table 2–6. When only VGA pass-through is desired, the
values should be programmed as indicated in Table 2–6 for VGA mode.
41
02
12
16
1
NA
t14
41
03
12
32
2
NA
t15
NOTES:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP3010M | Video Interface Palette |
| TVP3020-175 | Video Interface PALETTE(視頻接口調(diào)色器) |
| TVP3020-135 | Video Interface PALETTE(視頻接口調(diào)色器) |
| TVP3025-135 | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| TVP3025-175 | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3010M | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3020 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3020-135MDN | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TVP3020-135PCE | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TVP3020-175MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
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