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參數(shù)資料
| 型號： | TVP3020-135 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE(視頻接口調(diào)色器) |
| 中文描述： | 視頻接口盒（視頻接口調(diào)色器） |
| 文件頁數(shù)： | 18/98頁 |
| 文件大?。?/td> | 582K |
| 代理商： | TVP3020-135 |
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2–4
the contents of the color-palette RAM at the address specified by the address register are copied into the
holding register and the address register is again incremented. As with writing to the palette, a block of color
values in consecutive locations may be read by writing the start address and performing continuous red,
green, and blue read cycles until the entire block has been read. Since the color-palette RAM is dual ported,
the RAM may be read during active display without disturbing the video.
2.2.3
Palette-Page Register
The palette-page register appears as an 8-bit register on the extended register map (see Section 2.1). Its
purpose is to provide high-speed color changing by removing the need for palette reloading. When using
1, 2, or 4 bit planes, the additional planes are provided from the page register. When using four bit planes,
the pixel inputs specify the lower four bits of the palette address with the upper four bits specified from the
page register. This gives the user the capability of selecting from 16 palette pages with only one chip access,
thus allowing all the screen colors to be changed at the line frequency. A bit-to-bit correspondence is used;
therefore, in the above configuration, page register bits 7 through 4 map onto palette address bits 7 through
4, respectively. This is illustrated in Table 2–3.
NOTE:
The additional bits from the page register are inserted after the read mask.
The palette-page register specifies the additional bit planes for the overlay field in
direct-color modes with less than 8 bits per pixel overlay.
Table 2–3. Allocation of Palette-Page Register Bits
NUMBER OF BIT PLANES
MSB
PALETTE ADDRESS BITS
LSB
8
M
M
M
M
M
M
M
M
4
P7
P6
P5
P4
M
M
M
M
2
P7
P6
P5
P4
P3
P2
M
M
1
P7
P6
P5
P4
P3
P2
P1
M
Pn = n bit from page register
M = bit from pixel port
Read Masking
The read-mask register is an 8-bit register used to enable or disable a bit plane from addressing the
color-palette RAM in the pseudo-color modes. Each palette address bit is logically ANDed with the
corresponding bit from the read mask register before going to the palette-page register and addressing the
palette RAM.
2.2.4
In order to provide maximum flexibility to control palette data, the read mask operation is performed before
the addition of the page register bits. Therefore, care must be taken in those modes that have less than eight
bits per pixel of pseudo color or overlay data. Be aware of the palette-page register settings in these modes.
2.3
Clock-Selection and Output-Clock (SCLK, RCLK, and VCLK) Generation
The Viewpoint VIP provides a maximum of four clock inputs. Two are dedicated as TTL inputs; the other
two can be selected as either one differential ECL input or two extra TTL inputs. The TTL inputs can be used
for video rates up to 140 MHz. The dual-mode clock input (ECL/TTL) is primarily an ECL input but can be
used as TTL-compatible inputs if the input-clock-selection register is so programmed. The clock source
used at power up is CLK0; an alternative source can be selected by software during normal operation. This
chosen clock input can be used unmodified as the dot clock (representing pixel rate to the monitor).
Alternatively, if the input-clock-selection register is programmed to use the internal frequency doubler, the
chosen clock source is used as a reference for multiplication. The device also allows for user programming
of RCLK, SCLK and VCLK outputs (reference, shift and video clocks) by using the output-clock-selection
register. The input-clock- and output-clock-selection registers are shown in Tables 2–4 and 2–5 and are
located in the indirect register map (see Table 2–2).
相關(guān)PDF資料 |
PDF描述 |
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| TVP3025-135 | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| TVP3025-175 | Video Interface PALETTE(三PLL，視頻接口調(diào)色器) |
| TVP3030-175 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-220 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| TVP3030-250 | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3020-135MDN | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TVP3020-135PCE | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TVP3020-175MDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3020-175PCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3020-200MDN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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