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| 型號(hào)： | VPX3214 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Video Pixel Decoders |
| 中文描述： | 視頻解碼器像素 |
| 文件頁(yè)數(shù)： | 23/80頁(yè) |
| 文件大小： | 752K |
| 代理商： | VPX3214 |
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VPX 3220 A, VPX 3216 B, VPX 3214 C
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
23
3.3. Windowing the Video Field
For each input video field, two non-overlapping windows
can be defined. The dimensions of these two windows
are supplied via I
2
C commands. The presence of two
windows allows separate processing parameters such
as filter responses and the number of pixels per line to
be selected.
External control over the dimensions of the windows is
performed by I
2
C writes to a window definition table
(WinDefTab). For each window, a corresponding Win-
DefTab is defined in a table of I
2
C registers. Data written
to these tables does not become active until the the cor-
responding latch bit is set in a control register. A 2-bit flag
specifies the field polarity over which the window is ac-
tive.
Vertically, as can be seen in Fig.
3–6, each window is de-
fined by a beginning line, a number of lines to be read-in,
and a number of lines to be output. Each of these values
is specified in units of video lines.
The option, to separately specify the number of input
lines and the number of output lines, enables vertical
compression. In the VPX, vertical compression is per-
formed via simple line dropping. A nearest neighbor al-
gorithm selects the subset of the lines for output. The
presence of a valid line is signaled by a reference signal.
The specific signal which is used for the blanking de-
pends on the transfer mode (synchronous/asynchro-
nous).
The numbering of the lines in a field of interlace video is
dependent on the line standard. Figs. 3–7 and 3–8 illus-
trate the mapping of the window dimensions to the actu-
al video lines. The indices on the left are the line num-
bers relative to the beginning of the frame. The indices
on the right show the numbering used by the VPX. As
seen here, the vertical boundaries of windows are de-
fined relative to the field boundary. Spatially, the lines
from field #1 are displayed above identically numbered
Line 1
Window 1
Window 2
begin
# lines in,
# lines out
begin
# lines in,
# lines out
Fig. 3–6:
Vertical dimensions of windows
from field #2. For example: On an interlace monitor, line
#23 from field #1 is displayed directly above line #23
from field #2. There are a few restrictions to the vertical
definition of the windows. Windows must not overlap
vertically, but can be adjacent. Windows must begin af-
ter line #6 (i.e. line #7 is the first one allowed) of their re-
spective fields. The number of lines out cannot be great-
er than the number of lines in (no vertical zooming). The
combined height of the two windows cannot exceed the
number of lines in the input field.
1
2
5
6
7
8
15
16
17
18
260
259
258
264
265
268
269
270
271
278
279
280
281
521
522
Field 1
Field 2
261
262
263
1
2
5
6
7
8
15
16
17
18
260
259
258
261
262
263
523
524
525
1
2
5
6
7
8
15
16
17
18
260
259
258
261
262
257
520
257
257
Fig. 3–7:
Mapping for 525/60 line systems
Field 1
Field 2
314
315
318
319
320
321
335
336
337
338
622
623
624
625
621
1
2
5
6
7
8
22
23
24
25
311
310
309
312
313
308
1
2
5
6
7
8
22
23
24
25
311
310
309
312
313
308
1
2
6
7
8
22
23
24
25
311
310
309
312
308
5
Fig. 3–8:
Mapping for 625/50 line systems
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VPX3214C | Video Pixel Decoders |
| VPX3224D | Video Pixel Decoders |
| VPX3224E | Video Pixel Decoders |
| VPX322XE | Video Pixel Decoders |
| VQ1000J | N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓60V,夾斷電流0.225A的N溝道增強(qiáng)型MOSFET晶體管) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VPX3214C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Pixel Decoders |
| VPX3214C(PLCC44) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Decoder Circuit |
| VPX3214C(QFP44) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Decoder Circuit |
| VPX3216B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Pixel Decoders |
| VPX3216B(PLCC44) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Decoder Circuit |
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