參數(shù)資料
型號(hào): VPX3214
廠商: Electronic Theatre Controls, Inc.
英文描述: Video Pixel Decoders
中文描述: 視頻解碼器像素
文件頁(yè)數(shù): 38/80頁(yè)
文件大?。?/td> 752K
代理商: VPX3214
PRELIMINARY DATA SHEET
VPX 3220 A, VPX 3216 B, VPX 3214 C
MICRONAS INTERMETALL
38
The FP RAM locations which manage the TV coding
standard (selection/recognition) all use a 3-bit code for
the eight supported standards. This code (shown below)
is assumed in the register descriptions which follow.
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
PAL B,G,H,I
NTSC M
SECAM
NTSC 44
PAL M
PAL N
PAL 60
NTSC Comb
(625/50)
(525/60)
(625/50)
(525/60)
(525/60)
(625/50)
(525/60)
(525/60)
FP-Register Table
FP Reg.
Address
Number
of Bits
Mode
Function
Name
TV Standard – Write
TVstndWr
F2
12
w
writeable control register for managing the TV coding standard
bit [0] :
Manual / Automatic Select
0
1
Automatic
Manual
mansel
bit [3:1] :
TV standard for manual selection
x x x
see table above
settv
bit [4] :
Latch the TV standard manually
1
latch (reset automatically)
lattv
bit [5] :
Composite / S-VHS select
0
1
Composite
S-VHS
svhssel
bit [9:6] :
Threshold for standard search results
1 1 1 1
perfect score (maximum score)
0 0 0 0
’no video’ (minimum score)
1 1 1 1
default
score
bit [11:10] reserved (must be set to zero)
The control register modes are
– w: write/read register
– r:
read-only register
– A: register or register field has function only in VPX 3220 A
The mnemonics used in the Intermetall VPX demo software are given in the last column.
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