參數(shù)資料
型號: VPX3214
廠商: Electronic Theatre Controls, Inc.
英文描述: Video Pixel Decoders
中文描述: 視頻解碼器像素
文件頁數(shù): 40/80頁
文件大?。?/td> 752K
代理商: VPX3214
PRELIMINARY DATA SHEET
VPX 3220 A, VPX 3216 B, VPX 3214 C
MICRONAS INTERMETALL
40
FP-Register Table
FP Reg.
Address
Number
of Bits
Mode
Function
Name
Automatic Gain Control
B2
12
w
sync amplitude reference
AGCref = 0:
Write 0 to FP register B5 after writing 0 to AGCref to disable the AGC
AGC disabled
AGCref
BE
12
w
start value for AGC gain while vertical lock or AGC is inactive
sgain
20
12
r
AGC gain value
gain
DVCO
58
12
w
crystal oscillator center frequency adjust, –2048..2047
dvco
59
12
r
crystal oscillator center frequency adjustment value for line lock mode.
true adjust value is DVCO – ADJUST.
For factory crystal alignment:
set DVCO=0, set lock mode, read crystal offset from ADJUST register and use
negative value for initial center frequency adjustment via DVCO.
adjust
26
12
w
line locked mode lock command/status
xlg
write:
100
0
enable lock
disable lock
read:
4095/0
locked / unlocked
Horizontal PLL
4B
12
w
gain of the horizontal PLL
bit [4:0]
gain for the integrating part of PLL control
if1
bit [9:5]
gain for the proportional part of PLL control
if2
bit [11:10]
reserved
The control register modes are
– w: write/read register
– r:
read-only register
– A: register or register field has function only in VPX 3220 A
The mnemonics used in the Intermetall VPX demo software are given in the last column.
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