參數(shù)資料
型號: W66910
文件頁數(shù): 29/81頁
文件大?。?/td> 1058K
代理商: W66910
Data Sheet
W66910 PCI ISDN S/T-Controller
Publication Release Date:
Feb,2001
Revision 1.0
-29 -
- The multiframe synchronization can be disabled by setting MFD bit in the D_MODE register.
- According to I.430 Recommendation, the S/Q channel can be used as operation and maintenance signalling
channel. At transmitter, a S/Q code for a message shall be repeated at least six times or as many as necessary to
obtain the desired response. At receiver, a message shall be considered received only when the proper codes is
received three consecutive times.
TABLE 7.6 Multiframe structure in S/T interface
Frame Number
NT-to-TE
F
A
-bit position
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
NT-to-TE
M bit
ONE
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
NT-to-TE
S bit
S1
ZERO
ZERO
ZERO
ZERO
S2
ZERO
ZERO
ZERO
ZERO
S3
ZERO
ZERO
ZERO
ZERO
S4
ZERO
ZERO
ZERO
ZERO
S1
ZERO
TE-to-NT
F
A
-bit position
Q1
ZERO
ZERO
ZERO
ZERO
Q2
ZERO
ZERO
ZERO
ZERO
Q3
ZERO
ZERO
ZERO
ZERO
Q4
ZERO
ZERO
ZERO
ZERO
Q1
ZERO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
etc.
7.2.7 Test Functions
The W66910 provides loop and test functions as follows:
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