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Data Sheet
W66910 PCI ISDN S/T-Controller
RA20
Publication Release Date:
Feb,2001
Revision 1.0
-71 -
RA27
RA26
RA25
RA24
RA23
RA22
RA21
RA27-20 Address Bits
Used in transparent mode only. These bits are used for the second byte address comparisons.
8.2.12 B1_ch Receive Frame Byte Count Low
Value after reset: 00H
7
6
5
RBC7
RBC6
RBC5
RBC7-0 Receive Byte Count
Used in transparent mode only. Eight least significant bits of the total number of bytes are in a received frame. These bits are
valid only after a RME interrupt and remain valid until the frame is acknowledge via the RACK bit.
B1_RBCL
Read Address 2BH
4
3
2
1
0
RBC4
RBC3
RBC2
RBC1
RBC0
8.2.13 B1_ch Receive Frame Byte Count High
Value after reset: 00H
7
6
5
LOV
LOV Message Length Overflow
Used in transparent mode only. A "1" in this bit indicates a received message
≥
8192 bytes. This bit is valid only after RME
interrupt and is cleared by the RACK command.
RBC12-8 Receive Byte Count
Used in transparent mode only. Five most significant bits of the total number of bytes are in a received frame. These bits are valid
only after a RME interrupt and remain valid until the frame is acknowledge via the RACK bit.
Note
: The frame length equals RBC12-0. This length is between 1 and 8191. After a RME interrupt, the number of data available
in B1_RFIFO is frame length modulus threshold.
Remainder = RBC12-0 MOD threshold
No of available data = remainder f remainder
≠
0 or
No of available data = threshold f remainder = 0
The remainder equals RBC5-0 if threshold is 64.
B1_RBCH
Read Address 2CH
4
3
2
1
0
RBC12 RBC11 RBC10
RBC9
RBC8
8.2.14 B1_ch Transmit Idle Pattern
Value after reset: FFH
B1_IDLE
Read/Write Address 2DH