參數(shù)資料
型號(hào)： W66910
文件頁(yè)數(shù)： 63/81頁(yè)
文件大小： 1058K
代理商： W66910
Data Sheet
W66910 PCI ISDN S/T-Controller
0
Publication Release Date:
Feb,2001
Revision 1.0
-63 -
7
6
5
4
3
2
1
Bit 7-0
Transmit data of GCI IC2 channel. A read to this register returns the previously written value.
8.1.43 GCI CI1 Indication Register
Value after reset : Undefined
7
6
CI1R_6
CI1R_6-1
nput data of GCI CI1 channel.
Example application is data of ARCOFI's Peripheral Control Interface input pins.
CI1R
Read
Address 48H
5
4
3
2
1
0
CI1R_5
CI1R_4
CI1R_3
CI1R_2
CI1R_1
8.1.44 GCI CI1 Command Register
Value after reset: 3FH
7
6
0
0
CI1X_6
CI1X6_1
Transmitted data of GCI CI1 channel. A read to these bits returns the previously written value.
Example application is data of ARCOFI's Peripheral Control Interface output pins.
CI1X
Read/Write
Address 49H
5
4
3
2
1
0
CI1X_5
CI1X_4
CI1X_3
CI1X_2
CI1X_1
8.1.45 GCI Extended Interrupt Register GCI_EXIR Read_clear
Value after reset : 00H
7
6
5
4
0
0
0
MO1C
MO1C Monitor Channel 1 Status Change
A change in the Monitor Channel 1 Interrupt register ( MO1I ) has occurred. A new Monitor channel byte is stored in the MO1R
register.
MO0C Monitor Channel 0 Status Change
A change in the Monitor Channel 0 Interrupt register (MO0I) has occurred. A new Monitor channel byte is stored in the MO0R
register.
IC1 IC1 Synchronous Transfer Interrupt
When enabled, an interrupt is generated at end of GCI IC1 time slot every GCI frame (125
μ
s).
Address 4AH
3
2
1
0
MO0C
IC1
IC2
CI1
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