參數(shù)資料
型號: W66910
文件頁數(shù): 70/81頁
文件大?。?/td> 1058K
代理商: W66910
Data Sheet
W66910 PCI ISDN S/T-Controller
Read/Write
Address 27H
Publication Release Date:
Feb,2001
Revision 1.0
-70 -
8.2.8 B1_ch Address Mask Register 1
Value after reset: 00H
7
6
MA17
MA16
MA15
MA17-10 Address Mask Bits
Used in transparent mode only. These bits mask the first byte address comparisons. If the mask bit is "1", the corresponding bit
comparison with B1_ADR1 is disabled.
0: Unmask comparison
1: Mask comparison
B1_ADM1
5
4
3
2
1
0
MA14
MA13
MA12
MA11
MA10
8.2.9 B1_ch Address Mask Register 2
Value after reset: 00H
7
6
MA27
MA26
MA25
MA27-20 Address Mask Bits
Used in transparent mode only. These bits mask the second byte address comparisons. If the mask bit is "1", the corresponding bit
comparison with B1_ADR2 is disabled.
0: Unmask comparison
1: Mask comparison
B1_ADM2
Read/Write
Address 28H
5
4
3
2
1
0
MA24
MA23
MA22
MA21
MA20
8.2.10 B1_ch Address Register 1
Value after reset: 00H
7
6
RA17
RA16
RA17-10 Address Bits
Used in transparent mode only. These bits are used for the first byte address comparisons.
B1_ADR1
Read/Write
Address 29H
5
4
3
2
1
0
RA15
RA14
RA13
RA12
RA11
RA10
8.2.11 B1_ch Address Register 2
Value after reset: 00H
7
6
B1_ADR2
Read/Write
Address 2AH
5
4
3
2
1
0
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