- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11834 > XR88C681P/40-F (Exar Corporation)IC UART CMOS DUAL 40PDIP PDF資料下載
參數(shù)資料
| 型號(hào)： | XR88C681P/40-F |
| 廠商： | Exar Corporation |
| 文件頁(yè)數(shù)： | 22/101頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC UART CMOS DUAL 40PDIP |
| 標(biāo)準(zhǔn)包裝： | 9 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 1 字節(jié)，3 字節(jié) |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 帶并行端口： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 40-PDIP |
| 包裝： | 管件 |
| 其它名稱： | 1016-1640 XR88C681P/40-F-ND |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)當(dāng)前第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)
XR88C681
27
Rev. 2.11
-INT0
-RD
-WR
ALE
PORT 0
(AD0 - AD7)
PORT 2
(A8 - A15)
-INTR
-RD
-WR
D0 - D7
A0 - A3
74HC373
C
D
Q
Address
Decoding
Logic
-CS
8051 CPU
XR88C681
CS_DUART
to other ICs
A0 - A3
A5 - A7
Figure 5. An Approach to Interfacing the XR88C681 DUART to the 8051 Microcontroller
The circuitry presented
Figure 5 would function as follows
during a DUART requested interrupt. The DUART device
requests an interrupt from the CPU by asserting its active
low -INTR output pin. This will cause the -INT0 input pin to
the CPU to go low. When this happens the 8051 CPU will
finish executing its current instruction, and will then
branch program control to the DUART interrupt service
routine. In the case of
Figure 5, since the DUART’s -INTR
pin is tied to the -INT0 pin of the C, then the beginning of
the interrupt service routine will be located in 0003H in
code memory. The 8051 CPU does not issue an Interrupt
Acknowledge signal back to the DUART. It will just begin
processing through the DUART’s interrupt service
routine. Once the CPU has eliminated the cause(s) of the
interrupt request, the DUART’s -INTR pin will be negated
service routine and resume normal operation.
C.6.1.2 8080A Microprocessor
The 8080A Microprocessor is one of the earlier version of
the Intel processors.
In general, it is an 8-bit
microprocessor that requires +5V, -5V, and +12V power
supplies. Additionally, this microprocessor requires two
other chips, in order to create a “complete” CPU module.
Typically, these devices would be the 8224 Clock
Generator and the 8228 System Controller. The 8224
Clock Generator is responsible for conditioning and
generating the necessary timing source for the 8080A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS27472T16B8PA | CONN RCPT 8POS WALL MT W/PINS |
| MS27473E12F8PA | CONN PLUG 8POS STRAIGHT W/PINS |
| VI-JWH-IW-F3 | CONVERTER MOD DC/DC 52V 100W |
| VI-JWH-IW-F2 | CONVERTER MOD DC/DC 52V 100W |
| VI-JWH-IW-F1 | CONVERTER MOD DC/DC 52V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR88C681XR101524CNN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101524M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101524N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101528CJJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XR88C681XR101528CNN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。