Table 17 and Table 18 present the relationship between the contents of the CSRs and the clock sourc" />
參數(shù)資料
型號： XR88C681P/40-F
廠商： Exar Corporation
文件頁數(shù)： 54/101頁
文件大小： 0K
描述： IC UART CMOS DUAL 40PDIP
標(biāo)準(zhǔn)包裝： 9
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 1 字節(jié)，3 字節(jié)
電源電壓： 4.75 V ~ 5.25 V
帶并行端口： 是
帶CMOS： 是
安裝類型： 通孔
封裝/外殼： 40-DIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 40-PDIP
包裝： 管件
其它名稱： 1016-1640
XR88C681P/40-F-ND
XR88C681
56
Rev. 2.11
and Receivers.
Table 17 and Table 18 present the relationship between the contents of the CSRs and the clock source
driving the Transmitters and Receivers.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Receiver Clock Select
Transmitter Clock Select
See
Table 18
See
Table 18
Table 17. Bit Format of the Clock Select Registers, CSRA and CSRB
Field
Bit Rate
CSR[7:4]
ACR[7] = 0
ACR[7] = 1
CSR[3:0]
X = 0
X = 1
X = 0
X = 1
0
50
75
50
0
1
110
0
1
0
134.5
0
1
200
150
200
0
1
0
300
3600
300
3600
0
1
0
1
600
14.4K
600
14.4K
0
1
0
1200
28.8K
1200
28.8K
0
1
1050
57.6K
2000
57.6K
1
0
2400
115.2K
2400
115.2K
1
0
1
4800
1
0
1
0
7200
1800
7200
1
0
1
9600
1
0
38.4K
19.2K
38.4K
1
0
1
Timer
1
0
External - 16X
1
External - 1X
Note:
the b suffix denotes a binary expression. x = don’t care value.
Table 18. Bit Format of the Clock Select Registers, CSR[3:0] and CSR[7:4]
Please note that Table 18 calls for the user to specify the
following parameters:
D
ACR[7] - the most significant bit (MSB) of the Auxil-
iary Control Register
D
X - The Extend bit
ACR[7] is the MSB of the Auxiliary Control Register, and
can easily be programmed by writing 1xxxxxxxb or
0xxxxxxxb to the ACR, in order to set or clear,
respectively.
X - The Select Extend bit
Each transmitter and receiver, within the DUART has an
extend bit that can be set or cleared by writing the
appropriate data to the channel’s Command Register.
Although this information can be found in
Table 3.
Table 19 summarizes these commands, and their effect
on the Extend bits.
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