參數(shù)資料
型號： XRT86VL34_07
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 111/175頁
文件大?。?/td> 904K
代理商： XRT86VL34_07
XRT86VL34
106
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
T
ABLE
95: A
LARM
& E
RROR
I
NTERRUPT
E
NABLE
R
EGISTER
(AEIER) H
EX
A
DDRESS
: 0
X
nB03
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Rx_YEL_STATE
RO
0
Receive Yellow Alarm State
This READ-ONLY bit indicates whether or not the Receive E1 Framer block
is currently declaring the Yellow Alarm condition within the incoming E1
data-stream, as described below.
Yellow alarm or Remote Alarm Indication (RAI) is declared when the ‘A’ bit
of two consecutive non-FAS frames is set to ‘1’, which is equivalent to tak-
ing 375us to declare a RAI condition. Yellow alarm is cleared when the ‘A’
bit of two consecutive non-FAS frames is set to 0, which is equivalent to
taking 375us to clear a RAI condition.
0 – The Receive E1 Framer block is NOT currently declaring the Yellow
Alarm condition.
1 – The Receive E1 Framer block is currently declaring the Yellow Alarm
condition.
6
Reserved
-
-
Reserved
5
RxMYEL ENB
R/W
0
Change of CAS Multiframe Yellow Alarm Interrupt Enable
.
This bit permits the user to either enable or disable the “Change in CAS
Multiframe Yellow Alarm”
Interrupt, within the XRT86VL34 device. If the user enables this interrupt,
then the Receive E1 Framer block will generate an interrupt in response to
either one of the following conditions.
1.
The instant that the Receive E1 Framer block declares CAS
Multiframe Yellow Alarm.
2.
The instant that the Receive E1 Framer block clears the CAS
Multiframe Yellow Alarm.
0 – Disables the “Change in CAS Multiframe Yellow Alarm” Interrupt.
1 – Enables the “Change in CAS Multiframe Yellow Alarm” Interrupt.
4
-
R/W
0
This bit should be set to’0’ for proper operation.
3
LCV ENB
R/W
0
Line Code violation interrupt enable
This bit permits the user to either enable or disable the “Line Code Viola-
tion” interrupt within the XRT86VL34 device. If the user enables this inter-
rupt, then the Receive E1 Framer block will generate an interrupt when
Line Code Violation is detected.
0 = Disables the interrupt generation when Line Code Violation is detected.
1 = Enables the interrupt generation when Line Code Violation is detected.
2
RxOOF ENB
R/W
0
Change in Out of Frame Defect Condition Interrupt enable
This bit permits the user to either enable or disable the “Change in Out of
Frame Defect Condition” Interrupt, within the XRT86VL34 device. If the
user enables this interrupt, then the Receive E1 Framer block will generate
an interrupt in response to either one of the following conditions.
1.
The instant that the Receive E1 Framer block declares the Out of
Frame defect condition.
2.
The instant that the Receive E1 Framer block clears the Out of
Frame defect condition.
0 – Disables the “Change in Out of Frame Defect Condition” Interrupt.
1 – Enables the “Change in Out of Frame Defect Condition” Interrupt.
相關(guān)PDF資料
PDF描述
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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